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AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

spectrum.ieee.org

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Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#3

Post by tzahola »

gigatexal wrote: post #2

Any hardware gurus out there care to tak about how this helps? I guess having a flat pool of heterogenous resources is nice. As long as there’s a decent SDK that abstracts the hard stuff away I’m all for it.

>As long as there’s a decent SDK that abstracts the hard stuff away

I'd be very skeptical of that. See: Cell Broadband Engine.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#4

Post by taneq »

Sounds like it's just the next step in the chain from discrete components -> ICs on a circuit board -> this. The active interposer is filling the role that the circuit board currently fills, with devices etched into the interposer filling the role of discrete components, making everything more compact.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#5

Post by gigatexal »

tzahola wrote: post #3
gigatexal wrote: post #2

Any hardware gurus out there care to tak about how this helps? I guess having a flat pool of heterogenous resources is nice. As long as there’s a decent SDK that abstracts the hard stuff away I’m all for it.

>As long as there’s a decent SDK that abstracts the hard stuff away I'd be very skeptical of that. See: Cell Broadband Engine.

Oh yeah it took what 8 years to get decent ps3 games?

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#6

Post by KenanSulayman »

Reminds me of this video from the Cisco TechWise Fundamental series: https://youtube.com/watch?v=l75B6D9xyMQL (“Fundamentals of Software-Defined Networking”)

That’s obviously not a hardware development, but I feel like the motivation may be similar: make components more modular; stabilize, standardize and align their interfaces.

By making these components “plug and play” the distance between a logical flow chart and the actual implementation is somewhat reduced, making the development of custom components more efficient and agile.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#7

Post by petermonsson »

gigatexal wrote: post #2

Any hardware gurus out there care to tak about how this helps? I guess having a flat pool of heterogenous resources is nice. As long as there’s a decent SDK that abstracts the hard stuff away I’m all for it.

As I see it, this is just a network on interposer instead of a network on chip (NoC). NoCs have simple rules for routing that also prevent deadlocks, so I am not sure that the idea here is that significant. The active interposer is a quite new idea. I haven’t followed it. Maybe the journalist found the rules more exiting than the active interposer idea.

Either way, the research is one of the many small steps forward to better chips.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#8

Post by asgionionio »

gigatexal wrote: post #2

Any hardware gurus out there care to tak about how this helps? I guess having a flat pool of heterogenous resources is nice. As long as there’s a decent SDK that abstracts the hard stuff away I’m all for it.

It won't be user-facing, so there won't be an SDK. It's a way of building chips better,like AMD's Infinity Fabric. You could integrate GPUs, multiple CPU dies (like Epyc), and DRAM on a single package and tie them all together with interposers, which would look to the user like a CPU with an integrated GPU and a big L4 cache.

Using multiple small dies and tying them together has several advantages. Small dies yield better, so sometimes several small dies are cheaper than one large one. There's also versatility because you can mix and match components.

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