Intel Xeon processor with FPGA now shipping • Hacker News Board

Re: Intel Xeon processor with FPGA now shipping

#41

Post by rhs-research » Fri, May 25, 2018, 1:04 PM UTC

ThrowawayR2 wrote: post #40

chx wrote: post #15

On a whole different level, if you are merely interested in FPGAs in your computer then the PicoEVB neatly goes in the same M.2 slot as wifi cards do and communicates over PCIe, even if just PCIe Gen 2 x1. As far as I am aware this is, by far, the cheapest way to get an FPGA on the PCIe bus.

There's no onboard RAM on the PicoEVB, other than whatever the FPGA itself provides. That makes it less interesting.

Agreed. M-key version coming soon with onboard RAM and 4x PCIe: https://github.com/RHSResearchLLC/uEVB

Re: Intel Xeon processor with FPGA now shipping

#42

Post by amelius » Fri, May 25, 2018, 1:41 PM UTC

sddfd wrote: post #12

This is great! I think that some time in the future, FPGA will be a vital part for data processing. In theory, an application with a computation-heavy task could program the FPGA to provide part of that task in hardware (think the hot innermost loop body). What I am worried about is the infrastructure that is needed to make this happen: Is there even support for this in our compilers? What would support look like?

> think the hot innermost loop body

In many applications data access is the bottleneck, and an FPGA coprocessor will not give any improvements in that area.

Using an FPGA to do arithmetic computations (e.g. as in audio/video coding) could provide a benefit, but I fail to see how this improves things much over having an extra CPU core.

The only thing an FPGA does is replace registers by wires, basically, and there's not much to be gained there, I guess.

Re: Intel Xeon processor with FPGA now shipping

#43

Post by ManuelKiessling » Fri, May 25, 2018, 1:47 PM UTC

exabrial wrote: post #36

This is cool! I have so many questions, like how does it work with context switching? How do they protect access to the cache?

They don't, it's an Intel CPU.

Re: Intel Xeon processor with FPGA now shipping

#44

Post by ropeadopepope » Fri, May 25, 2018, 1:58 PM UTC

semi-extrinsic wrote: post #5

quadruplebond wrote: post #4

Earlier quoted context omitted.

Pretty sure that Phi as you know it is largely being left. Argonne's Aurora exascale machine was suppose to be Xeon Phi, but it has been postponed till 2021 and will likely use some other tech. Also look at the top 500 list from late 2017. Trinity the NNSA computer at #7 is Phi based but only gets about 50% of theoretical peak.

My personal tinfoil hat take is that Xeon Phi was made to make China waste top dollar on their supercomputers going with a less useful accelerator made by a US company.

Not if you believe Tom Forsyth

http://tomforsyth1000.github.io/blog.wiki.html#%5B%5BWhy%20d...

Re: Intel Xeon processor with FPGA now shipping

#45

Post by segmondy » Fri, May 25, 2018, 1:58 PM UTC

mtgx wrote: post #16

sehugg wrote: post #10

From The Next Platform ( https://www.nextplatform.com/2018/05/24/a-peek-inside-that-i... ): The initial workload that Intel is targeting is putting Open Virtual Switch, the open source virtual switch, on the FPGA, offloading some switching functions in a network from the CPU where such virtual switch software might reside either inside a server virtualization hypervisor or outside of it but alongside virtual machines…

That seems like a weak benefit. I don't think the fpga part will be cheap. In fact it will probably be significantly more expensive than the CPU. So then why not buy a chip with twice the cores if running twice the VMs is what you want to do with it? Also you can buy an AMD EPYC chip with twice the cores for about the same price you'd pay only for the CPU part of this chip/half the intel cores.

Folks that need this don't care about the expense. it's about the pipeline between the CPU and FPGA. If it's 5-10x as fast as plugin FPGA, There will be a market.

Re: Intel Xeon processor with FPGA now shipping

#46

Post by jdubs » Fri, May 25, 2018, 2:02 PM UTC

Looks like a future AWS instance type.

Re: Intel Xeon processor with FPGA now shipping

#47

Post by phendrenad2 » Fri, May 25, 2018, 2:02 PM UTC

chx wrote: post #15

On a whole different level, if you are merely interested in FPGAs in your computer then the PicoEVB neatly goes in the same M.2 slot as wifi cards do and communicates over PCIe, even if just PCIe Gen 2 x1. As far as I am aware this is, by far, the cheapest way to get an FPGA on the PCIe bus.

Beware trying to use these on desktops with a PCIe adapter though, the adapters don't seem to break out all the correct signals, so you get USB, or PCIe, but not both.

Re: Intel Xeon processor with FPGA now shipping

#48

Post by sannee » Fri, May 25, 2018, 2:18 PM UTC

rjsw wrote: post #39

sannee wrote: post #29

Earlier quoted context omitted.

> They cannot compete with GPUs on flops with Xeon, but an embedded FPGA might get them closer. FPGAs aren't known for their FLOPs though. Sure, the high end ones pack a punch, but compared to GPUs are still extremely expensive.

Altera has hard floating point blocks in their FPGAs, I don't think any other manufacturer does though.

Yeah - the best Stratix 10 can do 9.2 TFLOPs. A GTX 1080 Ti can do 11.3 TFLOPs. Now I can't find any price info on those Stratixes, but given how expensive these FPGAs generally get, I highly doubt it will be anywhere near the $700 for a 1080 (and that's for the entire card!).

I am not saying these things don't have applications, but the "usual" computational workloads are not one of them.

Re: Intel Xeon processor with FPGA now shipping

#49

Post by thesz » Fri, May 25, 2018, 2:43 PM UTC

pjc50 wrote: post #33

thesz wrote: post #24

Earlier quoted context omitted.

You won't have enough resources for video encoding, most probably. Arria 10 FPGA has 67M bits of memory total (8.5M bytes ), including one simulated with registers. As far as I remember, just storing 1920x1080 (HD) frame in 4:2:0 mode would require 4M bytes, half of memory. 4K would require 4 times as much resources. You may do some on-line processing like running neural net on the video content, but that's about it.…

You have more than enough resources for video encoding, because all modern codecs have a macroblock structure. You don't need to keep the whole current frame in at once, you can slide a window around it. (Conversely, you do need to keep the matching area of the previous frame and maybe even the next frame in order to do proper inter-prediction). That said I would assume GPUs are more suited to this task. By FPGA stan…

You are also limited by number of access paths into the memory which holds, say, macroblock. I forgot about this issue, sorry.

For block RAM in previous generation FPGAs from Altera there were one read and one write paths. To have two read paths you would need to copy block RAM as many times as you need read paths. This means that if you search for block content inside a macroblock with N parallel accesses you would need N copies of macroblock stored.

Tabula's time shifting tech allowed for up to, I believe, twelve paths into the block RAM, six for read and six for write (they were time-scheduled to 1-read-1-write block RAM operating at six times the frequency). I thought this thing would be a road for superscalar FPGA CPUs, but Tabula was closed.

You can imagine not using RAM at all, but then you will spend other resources in FPGA.

These are problems with video compression I see here. I think they are substantial but not unsurmountable and require a balance to solve. It is just me that I saw the balance is not in favour of FPGA.

Re: Intel Xeon processor with FPGA now shipping

#50

Post by [deleted] » Fri, May 25, 2018, 2:50 PM UTC

Scaevolus wrote: post #3

arcanus wrote: post #2

Could this be a hint at Intel's supercomputing and AI strategy? They cannot compete with GPUs on flops with Xeon, but an embedded FPGA might get them closer. It is a risky strategy however. Even if they can attain similar performance, which I doubt, programmability remains the big problem for FPGAs. I know Intel is pushing openCL but it simply does not have an ecosystem for software right now, and it remains to be se…

Xeon Phi coprocessors are flops competitive with GPUs and are used in many supercomputers. Embedded FPGA accelerators are of interest primarily to large server farms and cloud operators, where the cost of development for FPGA acceleration is cheaper than the savings of acceleration-- Microsoft in particular has done a lot of work in this area (for Bing), and probably worked with Intel to define the CPU.

[deleted]