Intel Xeon processor with FPGA now shipping
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Intel Xeon processor with FPGA now shipping
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Re: Intel Xeon processor with FPGA now shipping
#2Could this be a hint at Intel's supercomputing and AI strategy? They cannot compete with GPUs on flops with Xeon, but an embedded FPGA might get them closer.
It is a risky strategy however. Even if they can attain similar performance, which I doubt, programmability remains the big problem for FPGAs. I know Intel is pushing openCL but it simply does not have an ecosystem for software right now, and it remains to be seen if they can even enable much of the feature set of openCL on an FPGA.
Re: Intel Xeon processor with FPGA now shipping
#3Could this be a hint at Intel's supercomputing and AI strategy? They cannot compete with GPUs on flops with Xeon, but an embedded FPGA might get them closer. It is a risky strategy however. Even if they can attain similar performance, which I doubt, programmability remains the big problem for FPGAs. I know Intel is pushing openCL but it simply does not have an ecosystem for software right now, and it remains to be se…
Xeon Phi coprocessors are flops competitive with GPUs and are used in many supercomputers.
Embedded FPGA accelerators are of interest primarily to large server farms and cloud operators, where the cost of development for FPGA acceleration is cheaper than the savings of acceleration-- Microsoft in particular has done a lot of work in this area (for Bing), and probably worked with Intel to define the CPU.
Re: Intel Xeon processor with FPGA now shipping
#4Could this be a hint at Intel's supercomputing and AI strategy? They cannot compete with GPUs on flops with Xeon, but an embedded FPGA might get them closer. It is a risky strategy however. Even if they can attain similar performance, which I doubt, programmability remains the big problem for FPGAs. I know Intel is pushing openCL but it simply does not have an ecosystem for software right now, and it remains to be se…
Xeon Phi coprocessors are flops competitive with GPUs and are used in many supercomputers. Embedded FPGA accelerators are of interest primarily to large server farms and cloud operators, where the cost of development for FPGA acceleration is cheaper than the savings of acceleration-- Microsoft in particular has done a lot of work in this area (for Bing), and probably worked with Intel to define the CPU.
Pretty sure that Phi as you know it is largely being left. Argonne's Aurora exascale machine was suppose to be Xeon Phi, but it has been postponed till 2021 and will likely use some other tech. Also look at the top 500 list from late 2017. Trinity the NNSA computer at #7 is Phi based but only gets about 50% of theoretical peak.
Re: Intel Xeon processor with FPGA now shipping
#5Earlier quoted context omitted.
Xeon Phi coprocessors are flops competitive with GPUs and are used in many supercomputers. Embedded FPGA accelerators are of interest primarily to large server farms and cloud operators, where the cost of development for FPGA acceleration is cheaper than the savings of acceleration-- Microsoft in particular has done a lot of work in this area (for Bing), and probably worked with Intel to define the CPU.
Pretty sure that Phi as you know it is largely being left. Argonne's Aurora exascale machine was suppose to be Xeon Phi, but it has been postponed till 2021 and will likely use some other tech. Also look at the top 500 list from late 2017. Trinity the NNSA computer at #7 is Phi based but only gets about 50% of theoretical peak.
My personal tinfoil hat take is that Xeon Phi was made to make China waste top dollar on their supercomputers going with a less useful accelerator made by a US company.
Re: Intel Xeon processor with FPGA now shipping
#6Earlier quoted context omitted.
Xeon Phi coprocessors are flops competitive with GPUs and are used in many supercomputers. Embedded FPGA accelerators are of interest primarily to large server farms and cloud operators, where the cost of development for FPGA acceleration is cheaper than the savings of acceleration-- Microsoft in particular has done a lot of work in this area (for Bing), and probably worked with Intel to define the CPU.
Pretty sure that Phi as you know it is largely being left. Argonne's Aurora exascale machine was suppose to be Xeon Phi, but it has been postponed till 2021 and will likely use some other tech. Also look at the top 500 list from late 2017. Trinity the NNSA computer at #7 is Phi based but only gets about 50% of theoretical peak.
Phi is dead. The next NERSC computer is GPUs. Not sure what Argonne is doing but there’s no reason to think it won’t be GPUs. The only reason Phi/KNL made sense was because it seemed like a conservative choice when GPUs were more exotic, which may have been okay if Intel didn’t have the crazy yield problems they had. FPGAs don’t make sense because the conservative choice at this point is GPU. I don’t think any of the leading compute facilities have the stomach for a new technology like this, especially from intel.
Re: Intel Xeon processor with FPGA now shipping
#7Earlier quoted context omitted.
Pretty sure that Phi as you know it is largely being left. Argonne's Aurora exascale machine was suppose to be Xeon Phi, but it has been postponed till 2021 and will likely use some other tech. Also look at the top 500 list from late 2017. Trinity the NNSA computer at #7 is Phi based but only gets about 50% of theoretical peak.
Phi is dead. The next NERSC computer is GPUs. Not sure what Argonne is doing but there’s no reason to think it won’t be GPUs. The only reason Phi/KNL made sense was because it seemed like a conservative choice when GPUs were more exotic, which may have been okay if Intel didn’t have the crazy yield problems they had. FPGAs don’t make sense because the conservative choice at this point is GPU. I don’t think any of the…
Cmon it wasn't just yield problems. Premise that you can just recompile CPU code and it would run quickly on Phi was false.
Re: Intel Xeon processor with FPGA now shipping
#8Could this be a hint at Intel's supercomputing and AI strategy? They cannot compete with GPUs on flops with Xeon, but an embedded FPGA might get them closer. It is a risky strategy however. Even if they can attain similar performance, which I doubt, programmability remains the big problem for FPGAs. I know Intel is pushing openCL but it simply does not have an ecosystem for software right now, and it remains to be se…
>programmability remains the big problem for FPGAs
I agree because there's added levels of complexity with HDLs that SW doesn't have to deal with. What would be nice is if there was a tool that you could declare your problem (functions) and your constraints (throughput, LUTs available) and it would figure out the memory, ALUs and pipe-lining needed to solve the problem.
Re: Intel Xeon processor with FPGA now shipping
#9Could this be a hint at Intel's supercomputing and AI strategy? They cannot compete with GPUs on flops with Xeon, but an embedded FPGA might get them closer. It is a risky strategy however. Even if they can attain similar performance, which I doubt, programmability remains the big problem for FPGAs. I know Intel is pushing openCL but it simply does not have an ecosystem for software right now, and it remains to be se…
>programmability remains the big problem for FPGAs I agree because there's added levels of complexity with HDLs that SW doesn't have to deal with. What would be nice is if there was a tool that you could declare your problem (functions) and your constraints (throughput, LUTs available) and it would figure out the memory, ALUs and pipe-lining needed to solve the problem.
Re: Intel Xeon processor with FPGA now shipping
#10From The Next Platform (https://www.nextplatform.com/2018/05/24/a-peek-inside-that-i...):
The initial workload that Intel is targeting is putting Open Virtual Switch, the open source virtual switch, on the FPGA, offloading some switching functions in a network from the CPU where such virtual switch software might reside either inside a server virtualization hypervisor or outside of it but alongside virtual machines and containers. This obviates the need for certain Ethernet switches in the kind of Clos networks used by hyperscalers, cloud builders, telcos, and other service providers and also frees up compute capacity on the CPUs that might otherwise be managing virtual switching. Intel says that by implementing Open Virtual Switch on the FPGA, it can cut the latency on the virtual switch in half, boost the throughput by 3.2X, and crank up the number of VMs hosted on a machine by 2X compared to just running Open Virtual Switch on the Xeon portion of this hybrid chip. That makes a pretty good case for having the FPGA right close to the CPU – provided this chip doesn’t cost too much.