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Sounds a lot like what OpenCAPI (https://opencapi.org) offers.
(disclosure: work for IBM on CAPI/OpenCAPI firmware enablement)
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Why are dev boards that much more expensive in general? I can't believe that it costs 10x as much to "just" put the chip on a pcie board.
These are usually full-custom boards, very low-volume, with many layers and fine pitch traces. The parts themselves may have thousands of pins, routed across a dozen layers or more. So the non-recurring engineering (NRE) costs are very high, and you don't get to recover them over much volume. Even at 10x the cost, the vendor is still losing money.
What's the use case of an integrated FPGA?
I can think of two possibilities: 1. Hardware accelerated custom crypto algorithms. 2. Specialized co-processor. You could implement an exotic processing architecture on the FPGA to off-load computations to, like a complex number processor with 52-bit words in a custom floating point format for a specific application.
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Wow, someone managed to make something even worse than the "compile your C to an FPGA" tools you see occasionally. The model is just too different for these things to make sense 99% of the time. It's like trying to run general purpose code on a GPU, but even worse.
Wait until you see the python-to-FPGA tool :P
So what can you do with 1.15M logic gates that are in that FPGA? Can you, say, multiply, say 2 256x256 FP32 matrices?
[1] https://www.altera.com/content/dam/altera-www/global/en_US/p...
[2] https://www.altera.com/content/dam/altera-www/global/en_US/p...
One stark flailure of the Altera acquisition is there has been little by way of tool chain integration. This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of. It's not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks. Intel's marketing arm can't distort that realit…
A lot of flailing about, as the ship goes down.
(Speaking simply generally, about this "word". Not about the topic(s) in this thread.)
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Wow, someone managed to make something even worse than the "compile your C to an FPGA" tools you see occasionally. The model is just too different for these things to make sense 99% of the time. It's like trying to run general purpose code on a GPU, but even worse.
For those of you missing context to understand why it's a bad idea... Typical programming languages run code one line at a time from the top to the bottom, occasionally calling functions or looping. FPGA's instead have code which specifies a kind of circuit diagram of what is connected to what. You can make something to translate one to the other, but by translating a programming language to a circuit diagram you usu…
The more useful way to write hardware using programming languages is to create a model of hardware and then use the language features to manipulate that model, and use it to create abstractions for actual hardware patterns.
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Because although HDL doesn't look difficult syntax wise, it requires a very good understanding of logic gates. People need to pretty much take a course in digital design to be able to write something meaningful. It took me a while to grok HDL and write working code (good, maintainable code aside) even though I took digital design courses.
HDL ISNT CODE. FPGAs don’t get firmware. HDL is a description of hardware.
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Because although HDL doesn't look difficult syntax wise, it requires a very good understanding of logic gates. People need to pretty much take a course in digital design to be able to write something meaningful. It took me a while to grok HDL and write working code (good, maintainable code aside) even though I took digital design courses.
HDL ISNT CODE. FPGAs don’t get firmware. HDL is a description of hardware.
HDL can be referred to as code. And I do know what HDL is and what FPGAs are, thank you.
So what can you do with 1.15M logic gates that are in that FPGA? Can you, say, multiply, say 2 256x256 FP32 matrices?
A number of obvious interesting applications jump out at me: crypto acceleration for mining, machine learning acceleration, JIT acceleration for interpreted languages… How doable is all this? Would you have to roll your own code or are there libraries?
Wrt interpreted languages, I use Ruby fairly often and now that there's MRuby[3] I wonder if Ruby could be made run blazingly fast on something like this Xeon+FPGA thing?
Oh to have a spare $€£￥ to get me one of these.
[0] https://www.intel.com/content/www/us/en/servers/accelerators...
[1] https://www.altera.com/solutions/acceleration-hub/accelerati...
[2] https://itpeernetwork.intel.com/intel-processors-fpga-better...