Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
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Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
#2Insert some random Moore's law comment here
Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
#3"Price: Arm, Leg" ... hard to miss the sarcasm.
Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
#4One stark flailure of the Altera acquisition is there has been little by way of tool chain integration. This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of. It's not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks. Intel's marketing arm can't distort that reality, and their product development arm seems too taxed to bridge the gap.
Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
#5One stark flailure of the Altera acquisition is there has been little by way of tool chain integration. This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of. It's not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks. Intel's marketing arm can't distort that realit…
> increasingly smaller number and expensive lot of folks.
There is this sentiment on HN that people in EE/embedded space don't really get paid well (compared to the average Javascript-slinging frontend dev). Is this not true for HDL folks?
Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
#6One stark flailure of the Altera acquisition is there has been little by way of tool chain integration. This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of. It's not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks. Intel's marketing arm can't distort that realit…
Learning an HDL isn't that hard. I was productive within a few weeks of starting to use VHDL.
A former colleague is now an Altera/Intel FAE, I will ask how things are going the next time we meet up for a beer.
Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
#7One stark flailure of the Altera acquisition is there has been little by way of tool chain integration. This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of. It's not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks. Intel's marketing arm can't distort that realit…
I guess that is what you get when the entire software engineering field turns to "Javascript and a distributed database" as a solution to everything. There is a lot more out there and people should spend the time learning it.
Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
#8One stark flailure of the Altera acquisition is there has been little by way of tool chain integration. This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of. It's not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks. Intel's marketing arm can't distort that realit…
Learning an HDL isn't that hard. I was productive within a few weeks of starting to use VHDL. A former colleague is now an Altera/Intel FAE, I will ask how things are going the next time we meet up for a beer.
HDLs are fine. I've found the tooling around them to be quite atrocious (slow, buggy, opaque, gui-based) though.
Be it for synthesis, simulation, or even just compiler errors it's pretty bad compared to software.
Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
#9One stark flailure of the Altera acquisition is there has been little by way of tool chain integration. This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of. It's not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks. Intel's marketing arm can't distort that realit…
I wouldn't be surprised if Intel came up with tools which help make use of the FPGA using higher languages like C.
Xilinx is already pushing it's Vivado HLx which is pretty much that. I'm not aware of Altera's current offerings but they won't overlook this so easily.
Re: Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
#10One stark flailure of the Altera acquisition is there has been little by way of tool chain integration. This is a CPU with a bag on the side, and that bag needs people that write HDL and understand computer architecture to make good use of. It's not really a harsh critique, but a warning that the lower you go is an increasingly smaller number and expensive lot of folks. Intel's marketing arm can't distort that realit…
Learning an HDL isn't that hard. I was productive within a few weeks of starting to use VHDL. A former colleague is now an Altera/Intel FAE, I will ask how things are going the next time we meet up for a beer.
Writing HDL isn't hard but doing it right(much like with C) I would argue is the tricky part.
The translation from Software -> Flip-Flops isn't nearly as natural and it's easy to try and apply SE techniques that while possible are totally unsuited for an FPGA.