TSMC Kicks Off Volume Production of 7nm Chips • Hacker News Board

Re: TSMC Kicks Off Volume Production of 7nm Chips

#31

Post by FPGAhacker » Tue, Apr 24, 2018, 11:17 PM UTC

burnte wrote: post #14

rb808 wrote: post #4

Wow. I still remember being amazed when micron widths came out. 7nm is close to a miracle. Semiconductor manufacturing improvements like this really have enabled the whole tech world improvements of the last few decades.

There isn't any feature of the transistors taht are 7nm wide, the smallest feature IIRC is the interconnect, which is about 30n-40nm. "7nm" is marketing wankery. https://en.wikichip.org/wiki/7_nm_lithography_process

Not quite accurate. There are a number of dimensions involved. Interconnect is definitely not the smallest.

This article show some examples: https://www.semiwiki.com/forum/content/3046-new-frontiers-sc...

Re: TSMC Kicks Off Volume Production of 7nm Chips

#32

Post by mappu » Tue, Apr 24, 2018, 11:17 PM UTC

jannes wrote: post #5

Did any chip vendor announce 7nm chips yet? Or is this still secret?

It's widely reported that the Snapdragon 855 will be on 7nm.

Re: TSMC Kicks Off Volume Production of 7nm Chips

#33

Post by nl » Tue, Apr 24, 2018, 11:18 PM UTC

craftyguy wrote: post #16

nl wrote: post #12

Note that the TSMC 7nm process is similar in feature size to Intel 10nm. https://en.m.wikipedia.org/wiki/7_nanometer#7_nm_process_nod...

Strange that there's no citation for that claim.. do you have one?

Here’s a comparison of the GF 7nm and Intel 10nm. It’s the same for TSMC afaik https://www.semiwiki.com/forum/content/7191-iedm-2017-intel-...

Re: TSMC Kicks Off Volume Production of 7nm Chips

#34

Post by ChuckMcM » Tue, Apr 24, 2018, 11:29 PM UTC

Fun stuff. I've got a key chain with an 80186 die, and a couple of the binders from Microprocessor Forum when they had dies on the cover. The features on those chips are "huge" compared to these things. I suspect a die using one of these processes that was big enough (say 100 sq mm) would just look like a mirror with chromatic interference lines running across it.

This announcement also bookends nicely with the first home made IC one (https://hackaday.com/2018/04/24/first-lithographically-produ...)

Re: TSMC Kicks Off Volume Production of 7nm Chips

#35

Post by opencl » Tue, Apr 24, 2018, 11:35 PM UTC

ChuckMcM wrote: post #34

Fun stuff. I've got a key chain with an 80186 die, and a couple of the binders from Microprocessor Forum when they had dies on the cover. The features on those chips are "huge" compared to these things. I suspect a die using one of these processes that was big enough (say 100 sq mm) would just look like a mirror with chromatic interference lines running across it. This announcement also bookends nicely with the first…

ICs have just looked like mirrors for a while now.

See this shot of a 14nm Vega die on the left and 28nm Fury die on the right: https://www.techpowerup.com/reviews/AMD/Radeon_RX_Vega_Previ...

Re: TSMC Kicks Off Volume Production of 7nm Chips

#36

Post by Lind5 » Tue, Apr 24, 2018, 11:40 PM UTC

vardump wrote: post #3

I wonder how reliable and durable 7nm chips will be. We might start to see chip failures even after a few years of use. https://semiengineering.com/transistor-aging-intensifies-10n...

There's no shortage of issues https://semiengineering.com/unsolved-litho-issues-at-7nm/ https://semiengineering.com/chip-aging-accelerates/

Re: TSMC Kicks Off Volume Production of 7nm Chips

#37

Post by dbcooper » Tue, Apr 24, 2018, 11:48 PM UTC

dogma1138 wrote: post #25

dbcooper wrote: post #8

Earlier quoted context omitted.

7nm is really just a node name. Gate length is probably about 20nm. Still very impressive though!

The gate pitch is 54mm for TSMC and 56nm for Global Foundries @ 7nm.

That's the distance between gate midpoints, not their characteristic dimension.

Re: TSMC Kicks Off Volume Production of 7nm Chips

#38

Post by kkmx » Tue, Apr 24, 2018, 11:48 PM UTC

elihu wrote: post #29

Havoc wrote: post #20

Earlier quoted context omitted.

Well that's annoying. How is anyone supposed to judge anything if they just make numbers up?

I think bits of SRAM per unit of area is a benchmark that some people use, as it corresponds to something that's meaningful and measurable.

That's a problematic metric as well because we don't know how much area the assist circuit takes up. Modern high-density SRAM cells cannot operate as is, they need an assist circuit to compensate for variations. For example for Intel's 10nm SRAM, they claim 77% area effiency (https://fuse.wikichip.org/news/525/iedm-2017-isscc-2018-inte...). But without those values, just bits/mm2 or so is problematic.

Re: TSMC Kicks Off Volume Production of 7nm Chips

#39

Post by btian » Tue, Apr 24, 2018, 11:56 PM UTC

Havoc wrote: post #20

burnte wrote: post #14

Earlier quoted context omitted.

There isn't any feature of the transistors taht are 7nm wide, the smallest feature IIRC is the interconnect, which is about 30n-40nm. "7nm" is marketing wankery. https://en.wikichip.org/wiki/7_nm_lithography_process

Well that's annoying. How is anyone supposed to judge anything if they just make numbers up?

Hopefully their customers are more sophisticated than designing their chip based on a single number.

Re: TSMC Kicks Off Volume Production of 7nm Chips

#40

Post by bitL » Tue, Apr 24, 2018, 11:58 PM UTC

I assume the production is already sold out for the next year for Bitcoin/Ethereum miner ASICs...

I am wondering for how long will we be stuck with 7mm/10mm (Intel) tech; maybe we will see the last silicon-based improvements in CPUs & GPUs for the next two decades...