Hacker News Board Hacker News, browsed like a classic message board
Live data from Hacker News

An ARM killer from IIT-M?

factordaily.com

Post reply on HN
Print view View original

91–100 of 130 posts

Re: An ARM killer from IIT-M?

#91

Post by deepnotderp »

ChuckMcM wrote: post #16

To be honest though building a processor these days is not exactly difficult. That is especially true if you start with someone else's ISA and they have already created a GCC or LLVM back end for it. I was at Sun during the development of SPARC and as part of the Systems group we got to see a lot of the trade offs up front but these days transistors are not nearly so scarce. If you stick to 30 - 50Mhz for your first…

Well, first of all this is for an IoT CPU, so there will probably be less competition there and it can probably be tuned to specific niches. But I have to disagree that building a new CPU is easy. This is only true if we're talking about "toy" CPUs like some of the RISC-V implementations put out by UCB undergrads, these run at ~200MHZ clocks and with sub-1 ILP. If you want to make a high end and energy efficient CPU, it's still quite a difficult task and most novel CPU projects (e.g. the Mill, I guess the Adapteva Epiphany might count, although it's not really a CPU) don't have an existing GCC/LLVM backend.

Re: An ARM killer from IIT-M?

#92

Post by krylon »

gsmadhusudan wrote: post #61
happy-go-lucky wrote: post #18

> The landscape is full of thick trees that have set down roots for decades. Bats, deers, and monkeys, seemingly comfortable with the few thousand bicycle-riding students, academics, and staff on campus, are easy to spot. The air, thanks to a recent bout of rains in Chennai, is as good as a hill station In addition to the above description, a picture should have been inserted above or below the paragraph.

http://iglc2018.com/images/iit/4.jpg https://qph.ec.quoracdn.net/main-qimg-2200d147343aa841a43a07... http://2.bp.blogspot.com/_OgX4b2N9a8E/S7OVv7jxhmI/AAAAAAAAAh... http://www.mbaskool.com/2013_images/photography/landscape_na... We are one of the last refuges of the endangered black buck. The spotted deer and bonnet macaques are more common in India. Odd that a university campus in the middle of a city is a refuge. T…

Wow!

I am happy when I can see a kestrel or a roe deer from my office. It must be amazing to work in such a beautiful scenery!

Re: An ARM killer from IIT-M?

#93

Post by gumby »

ChuckMcM wrote: post #16

To be honest though building a processor these days is not exactly difficult. That is especially true if you start with someone else's ISA and they have already created a GCC or LLVM back end for it. I was at Sun during the development of SPARC and as part of the Systems group we got to see a lot of the trade offs up front but these days transistors are not nearly so scarce. If you stick to 30 - 50Mhz for your first…

Depends a lot on what you are building. If you're talking about a von Neumann machine with symmetric registers -- basically a PDP-11 derivative aka "C machine" -- then you're right: you "simply" have the hard part of, you know, designing a chip, which is an art, and at any appreciable clock frequency, de facto mixes digital and analog design.

But as soon as your stray off that path you're on your own (and you still have the chip design problems as well). The Mill guys have been at it 14+ years (admittedly none full time AFAICT).

Re: An ARM killer from IIT-M?

#94

Post by CalChris »

microcolonel wrote: post #87
CalChris wrote: post #76

Earlier quoted context omitted.

Strictly speaking, the UC System is the state. That IBM funded some of RISC-V doesn’t make RISC-V a capitalist product nor does TSMC manufacturing some silicon. The US Government and the University of California can claim intellectual property rights including patents, copyrights and trademarks. That SiFive is incorporated to exploit RISC-V as was Sun Microsystems to exploit 4.2 changes nothing.

The U.S. government can not claim copy rights on work produced by government employees. Read the statute before commenting on it, especially if you're using it as a point of disagreement. The one way the U.S. government can come to own copy rights is by purchasing them from original rights holders. No copy right exists for any work of a U.S. government employee.

You may wish to read 15 USC § 290e. There are other exceptions.

Re: An ARM killer from IIT-M?

#95

Post by vivalogic »

gsmadhusudan wrote: post #30

As the lead architect of Shakti and the guy who helped kick-start the project, I figure I am owed my 2 cents ! 1. We never positioned it as an ARM killer ! That was the imagination of the reporter who wrote the article. 2. Shakti is not a state only project. Parts of Shakti are funded by the govt, these relate to cores and SoCs needed by the Govt. The defense and strategic sector procurement is huge, runs in the 10s…

>3. The CPU eco-system including ARM's is a bit sclerotic. It is not the lic cost that is the problem, it is the inherent lack of flexibility in the model.

When not even Google can get a CPU without built in IME/PSP "secure" processors running insecure code, that seems like an understatement.

It seems like almost everyone is ignoring the epic fallout of a truly malicious entity discovering and silently exploiting a remotely exploitable security hole in for example Intel ME. They could more or less shut down whole countries by a key press.

And that would be just the start. When you can't be sure if there is malicious software remaining deep inside your processors, you pretty much have to shred them. And the motherboard, and the disk drives (http://spritesmods.com/?art=hddhack), etc. You simply would have to replace your whole IT-infrastructure. Then you need to try to figure out what sensitive data was lost... It would be a nightmare for sure. If I were Google or Amazon I would be absolutely paranoid.

How much will it cost for USA to implement a replacement for Social Security Numbers after the Equifax leak?

As our dependence on IT increases it becomes a more attractive target, so a well protected IT-infrastructure will be an absolute necessity in the near future. To be able to build a secure infrastructure, we need a hardware foundation that we can trust. We simply don't have that today!

Shakti sounds like it can be the foundation we need, I very much hope so.

Re: An ARM killer from IIT-M?

#96

Post by nickpsecurity »

ChuckMcM wrote: post #16

To be honest though building a processor these days is not exactly difficult. That is especially true if you start with someone else's ISA and they have already created a GCC or LLVM back end for it. I was at Sun during the development of SPARC and as part of the Systems group we got to see a lot of the trade offs up front but these days transistors are not nearly so scarce. If you stick to 30 - 50Mhz for your first…

Adapteva has nice write-ups on the challenges and a solution that worked for them in their market:

http://www.adapteva.com/andreas-blog/semiconductor-economics...

https://www.eetimes.com/author.asp?section_id=36&doc_id=1266...

https://www.eetimes.com/document.asp?doc_id=1330568

There's also companies that are a cross between ASIC's and FPGA's called Structured ASIC's that can get the initial NRE down for a prototype. eASIC and Triad Semiconductor are two. eASIC has a lot of IP on it already.

The last point is that operations such as DARPA show that government funding can knock out the worst of the NRE. India is using government funding. The reason we normally see things done that way still being very expensive is that those receiving the government funding are trying to maximize profit, get lots of patents, and eliminate competition that threatens that profit. An alternative for those aiming for public benefit is to work out the bugs from an initial CPU or SOC whose NRA was government backed to then release just over cost or at a decent markup. Each new wave of funding that produces new iterations soaks up the high NRE with the steady sales revenue doing the rest. Might work.

OpenPITON and PULP are two things that came to mind as having potential there with one an alternative to SMP/multicore in server side and other for embedded. PULP actually used that model that I can tell.

http://parallel.princeton.edu/openpiton/

http://www.pulp-platform.org/

Re: An ARM killer from IIT-M?

#97

Post by zitterbewegung »

ChuckMcM wrote: post #16

To be honest though building a processor these days is not exactly difficult. That is especially true if you start with someone else's ISA and they have already created a GCC or LLVM back end for it. I was at Sun during the development of SPARC and as part of the Systems group we got to see a lot of the trade offs up front but these days transistors are not nearly so scarce. If you stick to 30 - 50Mhz for your first…

I think the best way that RISC V can be successful is to market to people who want open hardware which they are doing . IoT would be a good place to market it or just electronic prototyping for Makers. The HiFive does this.

Re: An ARM killer from IIT-M?

#98

Post by vivalogic »

vivalogic wrote: post #95
gsmadhusudan wrote: post #30

As the lead architect of Shakti and the guy who helped kick-start the project, I figure I am owed my 2 cents ! 1. We never positioned it as an ARM killer ! That was the imagination of the reporter who wrote the article. 2. Shakti is not a state only project. Parts of Shakti are funded by the govt, these relate to cores and SoCs needed by the Govt. The defense and strategic sector procurement is huge, runs in the 10s…

>3. The CPU eco-system including ARM's is a bit sclerotic. It is not the lic cost that is the problem, it is the inherent lack of flexibility in the model. When not even Google can get a CPU without built in IME/PSP "secure" processors running insecure code, that seems like an understatement. It seems like almost everyone is ignoring the epic fallout of a truly malicious entity discovering and silently exploiting a r…

if you haven't seen it: https://www.youtube.com/watch?v=PLJJY5UFtqY

He's a security expert working for Google. Here he is explaining just how bad the situation is.

here he talks about lack of trustable CPU:s https://youtu.be/JCa3PBt4r-k?t=7m22s

Re: An ARM killer from IIT-M?

#99

Post by ikamthania »

gsmadhusudan wrote: post #35
gsmadhusudan wrote: post #30

As the lead architect of Shakti and the guy who helped kick-start the project, I figure I am owed my 2 cents ! 1. We never positioned it as an ARM killer ! That was the imagination of the reporter who wrote the article. 2. Shakti is not a state only project. Parts of Shakti are funded by the govt, these relate to cores and SoCs needed by the Govt. The defense and strategic sector procurement is huge, runs in the 10s…

Also everyone is welcome to review our code and to contribute to the codebase. It is an open source project. IIT-M incubated it but we want it to be community driven. FPGA based dev packages should be announced by jan , based on standard low cost FPGA boards. Dev parts based on ASIC parts will probably be announced 2nd quarter of next year assuming Feb/March tapeout.We would be glad to help other universities do thei…

Congratulation on the project. Where can one find the source? Is this the one? https://bitbucket.org/casl/shakti_public

Re: An ARM killer from IIT-M?

#100

Post by dummyfunnytoo »

kstenerud wrote: post #54
inteleng wrote: post #43

Earlier quoted context omitted.

I'm not sure why pedroaraujo is being downvoted other than in response to his criticism of HN topcommenter Chuck McManis. Pedro is correct; toy CPUs , like what Chuck mentioned building, are so trivial that undergraduate students can build functioning models of them in a few days or hours. They are quite literally thousands of times less complex than the CPUs (even RISC arches) that are discussed in the article. I al…

When you post a rude reply about a topic not many people have expertise in, the only thing up/downvoters have to go on is how you carry yourself. My first gut reaction to his reply was "troll."

Funny, my reaction to the first comment was "douchebag"...
Post reply on HN