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An ARM killer from IIT-M?

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Re: An ARM killer from IIT-M?

#81

Post by _blz2 »

xelxebar wrote: post #79
gsmadhusudan wrote: post #30

As the lead architect of Shakti and the guy who helped kick-start the project, I figure I am owed my 2 cents ! 1. We never positioned it as an ARM killer ! That was the imagination of the reporter who wrote the article. 2. Shakti is not a state only project. Parts of Shakti are funded by the govt, these relate to cores and SoCs needed by the Govt. The defense and strategic sector procurement is huge, runs in the 10s…

> 3. The CPU eco-system including ARM's is a bit sclerotic. Silly question, but what do you mean by "sclerotic" here? I had to look up the word and only found medical definitions.

I looked it up too. It also means 'rigid and unresponsive'

Re: An ARM killer from IIT-M?

#82

Post by wbl »

bonzini wrote: post #45
bsder wrote: post #28

Earlier quoted context omitted.

> And DEC alpha. I really wish all these "open source" chips would just steal the DEC Alpha microarchitecture and implement it. It's been almost 20 years--even the patents on EV7 should have run out by now. It was a really clean, mostly orthogonal microarchitecture that had most of the really annoying implementation corners filed down. EV5 is a very straightforward chip and maps very well to low power implementations…

That's what some people were doing with SuperH; I don't know how the project has progressed. https://lwn.net/Articles/647636/ [If you wanted to resurrect the Alpha, though, please do not resurrect the crazy memory consistency semantics, where you need to put a full memory barrier between r0 = load(&x); r1 = load(r0);

How else will I be able to bank the lower-level cache for the absolute highest in performance?

Re: An ARM killer from IIT-M?

#83

Post by tonmoy »

ChuckMcM wrote: post #16

To be honest though building a processor these days is not exactly difficult. That is especially true if you start with someone else's ISA and they have already created a GCC or LLVM back end for it. I was at Sun during the development of SPARC and as part of the Systems group we got to see a lot of the trade offs up front but these days transistors are not nearly so scarce. If you stick to 30 - 50Mhz for your first…

Then why do so many companies spend so much money buying ARM cores, they have the ISA (more or less) and the compiler, why doesn’t every chip design company make their own processor? I know for a fact that some companies that had their own line of ARM competition ended up using ARM in the end

Re: An ARM killer from IIT-M?

#84

Post by gsmadhusudan »

phkahler wrote: post #72
gsmadhusudan wrote: post #30

As the lead architect of Shakti and the guy who helped kick-start the project, I figure I am owed my 2 cents ! 1. We never positioned it as an ARM killer ! That was the imagination of the reporter who wrote the article. 2. Shakti is not a state only project. Parts of Shakti are funded by the govt, these relate to cores and SoCs needed by the Govt. The defense and strategic sector procurement is huge, runs in the 10s…

You said "open source Rust based MK OS..." Does that mean an OS written in Rust? I had not heard of that. As I recall the Rust support for RISC-V is quite limited for now until the LLVM patches go upstream (which will be soon). I agree with your statement "I have no idea how successful we will be and I frankly do not care." There will be a lot of benefits as a result of this work regardless of the immediate outcome.…

Rust support is getting better. Our Rust OS is lower priority but it is needed for our tagged ISA support since we need language extensions to add security semantics to pointers. Also Rust is a much safer language. We need all this since safety critical systems is a key Shakti target.

Re: An ARM killer from IIT-M?

#85

Post by jabl »

gsmadhusudan wrote: post #84
phkahler wrote: post #72

Earlier quoted context omitted.

You said "open source Rust based MK OS..." Does that mean an OS written in Rust? I had not heard of that. As I recall the Rust support for RISC-V is quite limited for now until the LLVM patches go upstream (which will be soon). I agree with your statement "I have no idea how successful we will be and I frankly do not care." There will be a lot of benefits as a result of this work regardless of the immediate outcome.…

Rust support is getting better. Our Rust OS is lower priority but it is needed for our tagged ISA support since we need language extensions to add security semantics to pointers. Also Rust is a much safer language. We need all this since safety critical systems is a key Shakti target.

Is this similar to the stuff lowrisc is doing?

Re: An ARM killer from IIT-M?

#86

Post by draw_down »

tasty_freeze wrote: post #22
bakul wrote: post #21

Earlier quoted context omitted.

Amd29000. Moto88000. And DEC alpha. But this is long due for India. Recall that the US semiconductor industry did have plenty of govt help at its inception. The Indian govt can similarly provide early support by being a customer. But still, it is going to be a tough row to hoe.

+1 for using the archaic phrase "tough row to hoe", and for using it correctly. :-) In the few times I've heard someone say it, they say "road to hoe" which doesn't really make sense.

Come on

Re: An ARM killer from IIT-M?

#87

Post by microcolonel »

CalChris wrote: post #76
microcolonel wrote: post #14

Earlier quoted context omitted.

I'm sure Bluespec, TSMC, SiFive, NXP, Samsung, Qualcomm, Microsemi, Micron, Huawei, and NVIDIA don't think of it like that, the RISC-V foundation is also not UC Berkeley. Also, strictly speaking the UC system ain't the state, if they were, they would not be allowed to generate copyrights from work produced by employees. IBM at least partially (if not completely) covered the fabrication of the original UCB RISC-V chip…

Strictly speaking, the UC System is the state. That IBM funded some of RISC-V doesn’t make RISC-V a capitalist product nor does TSMC manufacturing some silicon. The US Government and the University of California can claim intellectual property rights including patents, copyrights and trademarks. That SiFive is incorporated to exploit RISC-V as was Sun Microsystems to exploit 4.2 changes nothing.

The U.S. government can not claim copy rights on work produced by government employees. Read the statute before commenting on it, especially if you're using it as a point of disagreement.

The one way the U.S. government can come to own copy rights is by purchasing them from original rights holders. No copy right exists for any work of a U.S. government employee.

Re: An ARM killer from IIT-M?

#88

Post by gh02t »

gsmadhusudan wrote: post #37
afsina wrote: post #33

Earlier quoted context omitted.

That is why most likely they will not succeed in economical sense. Commercial tech space is just way too fast for governments to follow efficiently.

On the contrary, we started Shakti because our lab can track technology faster than a commercial outfit ! I am an ex-industry architect and a startup CEO who came back to academia started this effort because the pvt sector was moving too slowly wrt CPU research and deployment. Done well govt entities can move really fast once you figure out how to deal with bureaucracy. And we can dream way bigger.

I agree, having worked in the American national lab system I can say that government research can easily keep pace with industry. Especially in risky or inherently costly industries, I'd argue that government funded research labs that work in collaboration with industry and academia are possibly the best equipped.

Re: An ARM killer from IIT-M?

#89

Post by krylon »

gsmadhusudan wrote: post #30

As the lead architect of Shakti and the guy who helped kick-start the project, I figure I am owed my 2 cents ! 1. We never positioned it as an ARM killer ! That was the imagination of the reporter who wrote the article. 2. Shakti is not a state only project. Parts of Shakti are funded by the govt, these relate to cores and SoCs needed by the Govt. The defense and strategic sector procurement is huge, runs in the 10s…

That sounds like an ambitious project, I hope it becomes a success!

I think the world can use some competition in the server space between different ISAs, the current Intel(-and-sometimes-AMD) monoculture is problematic for a number of reasons.

Re: An ARM killer from IIT-M?

#90

Post by pkhagah »

PinguTS wrote: post #50
inteleng wrote: post #43

Earlier quoted context omitted.

I'm not sure why pedroaraujo is being downvoted other than in response to his criticism of HN topcommenter Chuck McManis. Pedro is correct; toy CPUs , like what Chuck mentioned building, are so trivial that undergraduate students can build functioning models of them in a few days or hours. They are quite literally thousands of times less complex than the CPUs (even RISC arches) that are discussed in the article. I al…

It seems both of you haven't read the article itself. The new CPU design is not about high-end CPU you expect from Intel or AMD. It is about CPUs for the IoT. We are talking about Cortex-M alike CPUs you find in micro-controllers from Infineon, NXP, Renesas, and alike. BTW there is competition to the ARM design. It is the micro-controllers from NXP former Freescale, which have their own CPU design heavily used in aut…

IITM will start with tapeout of microcontroller class(C-class) CPU. But IITM is designing mobile, server and HPC class CPUs.

http://rise.cse.iitm.ac.in/shakti.html

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