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An ARM killer from IIT-M?

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Re: An ARM killer from IIT-M?

#51

Post by laughingman2 »

gsmadhusudan wrote: post #37
afsina wrote: post #33

Earlier quoted context omitted.

That is why most likely they will not succeed in economical sense. Commercial tech space is just way too fast for governments to follow efficiently.

On the contrary, we started Shakti because our lab can track technology faster than a commercial outfit ! I am an ex-industry architect and a startup CEO who came back to academia started this effort because the pvt sector was moving too slowly wrt CPU research and deployment. Done well govt entities can move really fast once you figure out how to deal with bureaucracy. And we can dream way bigger.

Thank you for the effort to free knowledge.

Re: An ARM killer from IIT-M?

#52

Post by m45t3r »

pedroaraujo wrote: post #29
ChuckMcM wrote: post #16

To be honest though building a processor these days is not exactly difficult. That is especially true if you start with someone else's ISA and they have already created a GCC or LLVM back end for it. I was at Sun during the development of SPARC and as part of the Systems group we got to see a lot of the trade offs up front but these days transistors are not nearly so scarce. If you stick to 30 - 50Mhz for your first…

That is simply not true. Building a CPU can be "easy" if you want to build something that works. If you want to build something that is power efficient and, at the same time, quite performant, then the complexity of the problem escalates very quickly. Sticking at 30-50 MHz? What is this even supposed to mean? Digital hardware design hardly takes clock speeds into consideration, except during physical implementation i…

> Sticking at 30-50 MHz? What is this even supposed to mean? Digital hardware design hardly takes clock speeds into consideration, except during physical implementation in the later stages of the hardware development.

I think what OP means is that you can simulate in software a 30-50MHz version of your own CPU, without having the hardware ready, so you can starting testing if i.e. Linux can boot.

Re: An ARM killer from IIT-M?

#53

Post by pedroaraujo »

PinguTS wrote: post #50
inteleng wrote: post #43

Earlier quoted context omitted.

I'm not sure why pedroaraujo is being downvoted other than in response to his criticism of HN topcommenter Chuck McManis. Pedro is correct; toy CPUs , like what Chuck mentioned building, are so trivial that undergraduate students can build functioning models of them in a few days or hours. They are quite literally thousands of times less complex than the CPUs (even RISC arches) that are discussed in the article. I al…

It seems both of you haven't read the article itself. The new CPU design is not about high-end CPU you expect from Intel or AMD. It is about CPUs for the IoT. We are talking about Cortex-M alike CPUs you find in micro-controllers from Infineon, NXP, Renesas, and alike. BTW there is competition to the ARM design. It is the micro-controllers from NXP former Freescale, which have their own CPU design heavily used in aut…

The comment applies to both high-end CPUs and to microcontrollers as well. Power and performance are even more critical on a microcontroller than on an high-end CPU.

Re: An ARM killer from IIT-M?

#54

Post by kstenerud »

inteleng wrote: post #43
pedroaraujo wrote: post #29

Earlier quoted context omitted.

That is simply not true. Building a CPU can be "easy" if you want to build something that works. If you want to build something that is power efficient and, at the same time, quite performant, then the complexity of the problem escalates very quickly. Sticking at 30-50 MHz? What is this even supposed to mean? Digital hardware design hardly takes clock speeds into consideration, except during physical implementation i…

I'm not sure why pedroaraujo is being downvoted other than in response to his criticism of HN topcommenter Chuck McManis. Pedro is correct; toy CPUs , like what Chuck mentioned building, are so trivial that undergraduate students can build functioning models of them in a few days or hours. They are quite literally thousands of times less complex than the CPUs (even RISC arches) that are discussed in the article. I al…

When you post a rude reply about a topic not many people have expertise in, the only thing up/downvoters have to go on is how you carry yourself.

My first gut reaction to his reply was "troll."

Re: An ARM killer from IIT-M?

#55

Post by mindentropy »

gsmadhusudan wrote: post #30

As the lead architect of Shakti and the guy who helped kick-start the project, I figure I am owed my 2 cents ! 1. We never positioned it as an ARM killer ! That was the imagination of the reporter who wrote the article. 2. Shakti is not a state only project. Parts of Shakti are funded by the govt, these relate to cores and SoCs needed by the Govt. The defense and strategic sector procurement is huge, runs in the 10s…

Thank you for all the efforts. I am interested in MCU synthesis on FPGAs and this is a really interesting project.

I just have one request though. If you are interested in Makers taking interest in your project please make sure your documentation is top quality. Also try to provide cheap dev boards so that the community can provide Linux or some RTOS port. I being in India it would help immensely if you have your dev resources at lower costs(FPGAs which I really doubt but dev boards with your processor, yes) so that people like me can help you with some OS ports. You can also follow the route of Adapteva Inc which can provide you with a template of good quality product (i.e. Good documentation, source code etc).

Re: An ARM killer from IIT-M?

#56

Post by pertymcpert »

inteleng wrote: post #43
pedroaraujo wrote: post #29

Earlier quoted context omitted.

That is simply not true. Building a CPU can be "easy" if you want to build something that works. If you want to build something that is power efficient and, at the same time, quite performant, then the complexity of the problem escalates very quickly. Sticking at 30-50 MHz? What is this even supposed to mean? Digital hardware design hardly takes clock speeds into consideration, except during physical implementation i…

I'm not sure why pedroaraujo is being downvoted other than in response to his criticism of HN topcommenter Chuck McManis. Pedro is correct; toy CPUs , like what Chuck mentioned building, are so trivial that undergraduate students can build functioning models of them in a few days or hours. They are quite literally thousands of times less complex than the CPUs (even RISC arches) that are discussed in the article. I al…

You have been exceptionally rude to a commentor that has not been rude at all but given some insight about the true difficulties of the making a viable CPU business.

Re: An ARM killer from IIT-M?

#57

Post by dkersten »

pedroaraujo wrote: post #53
PinguTS wrote: post #50

Earlier quoted context omitted.

It seems both of you haven't read the article itself. The new CPU design is not about high-end CPU you expect from Intel or AMD. It is about CPUs for the IoT. We are talking about Cortex-M alike CPUs you find in micro-controllers from Infineon, NXP, Renesas, and alike. BTW there is competition to the ARM design. It is the micro-controllers from NXP former Freescale, which have their own CPU design heavily used in aut…

The comment applies to both high-end CPUs and to microcontrollers as well. Power and performance are even more critical on a microcontroller than on an high-end CPU.

And yet you yourself said:

> The CPUs you mentioned were simple micro-controllers, they were not designed for heavy processing tasks, they don't even have a branch predictor which is something fundamental to have some significant performance.

So it seems his comparison was fair, after all? Given that the article is about microcontrollers too.

Re: An ARM killer from IIT-M?

#60

Post by gsmadhusudan »

gsmadhusudan wrote: post #30

As the lead architect of Shakti and the guy who helped kick-start the project, I figure I am owed my 2 cents ! 1. We never positioned it as an ARM killer ! That was the imagination of the reporter who wrote the article. 2. Shakti is not a state only project. Parts of Shakti are funded by the govt, these relate to cores and SoCs needed by the Govt. The defense and strategic sector procurement is huge, runs in the 10s…

I got a lot of emails regarding Shakti's positioning. As can be seen from our webpage, specific cores have been positioned to offer alternative to commercial cores including ARM's cores. Whether ARM gets affected by this or not is not for me to say. But to conclude that SHAKTI and the RISC-V eco-system in general could affect ARM significantly is not an unreasonable conclusion.So the reporter is well within the realm of reason to arrive at the conclusion he did. I am just making a distinction between causal reactions and intent !
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