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“We have obtained fully functional JTAG for Intel CSME via USB DCI”

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Re: “We have obtained fully functional JTAG for Intel CSME via USB DCI”

#21

Post by vog »

_0ffh wrote: post #15
jimmyswimmy wrote: post #8

Earlier quoted context omitted.

I'll give a try. Someone else can correct me later. These guys have used a JTAG f debugging dongle to access the Intel management engine. They can now read every bit of code. Which means that secrets stored within the code including keys and bugs are available to them and anyone who can replicate their work. Since the management engine is in nearly all of Intel chips, we're screwed. AMD have something similar so no h…

"AMD have something similar so no help there" It's probably worse for AMD. For Intel now at least we'll probably get the ability to securely disable everything below ring -1.

It's such a pity that there is no real competition in that area. (Unless you go the totally different architectures such as ARM or RISC-V.)

AMD had the chance to differentiate from Intel here, instead they blindly immitate the same customer-hostile stunt.

Re: “We have obtained fully functional JTAG for Intel CSME via USB DCI”

#24

Post by vog »

Sharlin wrote: post #14
drdaeman wrote: post #7

Earlier quoted context omitted.

If I got it right, they got a debugger access to the processor that runs ME, via an USB port. So they can mess with ME (dump its code, analyze it, observe how it runs, modify it live) as they see fit.

Doesn't help if you don't know what ME is (I didn't). But a sibling comment explained it well.

For a very good explaination on that topic, see the following 32C3 presentation:

"Towards (reasonably) trustworthy x86 laptops"

https://media.ccc.de/v/32c3-7352-towards_reasonably_trustwor...

Also, the paper by the author is worth a read:

"State considered harmful - A proposal for a stateless laptop"

https://blog.invisiblethings.org/papers/2015/state_harmful.p...

Re: “We have obtained fully functional JTAG for Intel CSME via USB DCI”

#25

Post by microcolonel »

vog wrote: post #21
_0ffh wrote: post #15

Earlier quoted context omitted.

"AMD have something similar so no help there" It's probably worse for AMD. For Intel now at least we'll probably get the ability to securely disable everything below ring -1.

It's such a pity that there is no real competition in that area. (Unless you go the totally different architectures such as ARM or RISC-V.) AMD had the chance to differentiate from Intel here, instead they blindly immitate the same customer-hostile stunt.

I don't want to get too deep into imagination, but the details of the ME/PSP story make it seem like an outside force of some sort is compelling them to add this stuff to their platforms.

Re: “We have obtained fully functional JTAG for Intel CSME via USB DCI”

#26

Post by kinleyd »

dsr_ wrote: post #12
retrac98 wrote: post #3

Can someone explain like I have a degree in computer science from a good university, but opted for a career as a software engineer in some relatively high level languages?

Intel CPUs have an embedded supervisory CPU called the Management Engine. It can read all of memory, control power states on the main CPU, and generally has super-root privileges on everything. You, an end-user, aren't allowed to program it. The current MEs run a form of Minix. They represent an incredible security and privacy risk, because we don't know what code they run and it is widely believed that the NSA or ot…

Thank you for that great explanation.

Re: “We have obtained fully functional JTAG for Intel CSME via USB DCI”

#27

Post by jcims »

retrac98 wrote: post #3

Can someone explain like I have a degree in computer science from a good university, but opted for a career as a software engineer in some relatively high level languages?

There's a computer in your computer so your computer can computer while you computer. These guys just found the keyboard.

Re: “We have obtained fully functional JTAG for Intel CSME via USB DCI”

#28

Post by microcolonel »

Asdfbla wrote: post #2

Any reason Intel doesn't just offer IME-free CPUs too? There's obviously interest considering the lengths organisations like Google go to to disable it and Intel supposedly already has such offers for governments.

ME is a useful part of the system. It is in charge of watchdog timers (I think) and mid-level power management. The problem is that it is persistent and opaque. If the operating system were responsible for configuring and managing ME, it would allow it to perform these tasks without being so odious.

Re: “We have obtained fully functional JTAG for Intel CSME via USB DCI”

#29

Post by vog »

microcolonel wrote: post #25
vog wrote: post #21

Earlier quoted context omitted.

It's such a pity that there is no real competition in that area. (Unless you go the totally different architectures such as ARM or RISC-V.) AMD had the chance to differentiate from Intel here, instead they blindly immitate the same customer-hostile stunt.

I don't want to get too deep into imagination, but the details of the ME/PSP story make it seem like an outside force of some sort is compelling them to add this stuff to their platforms.

It's indeed nice to imagine that the people behind Intel are relieved that somebody finally found the kill-switch they left behind in the monster they had to create.

And the AMD people now thinking hard how they can leak hints to their kill-switch in an inconspicuous way, too.

But that's indeed imagination. Unforunately, we don't (yet) know much about their motivations.

Re: “We have obtained fully functional JTAG for Intel CSME via USB DCI”

#30

Post by vim_wannabe »

vog wrote: post #21
_0ffh wrote: post #15

Earlier quoted context omitted.

"AMD have something similar so no help there" It's probably worse for AMD. For Intel now at least we'll probably get the ability to securely disable everything below ring -1.

It's such a pity that there is no real competition in that area. (Unless you go the totally different architectures such as ARM or RISC-V.) AMD had the chance to differentiate from Intel here, instead they blindly immitate the same customer-hostile stunt.

Any clue as to why they chose not to differentiate?

Is it too costly to build a separate non-remote CPU for non-enterprise? Does it provide some useful functionality for regular consumers?

The answer is probably they do not think there's a market for it, but still makes me wonder.

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