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Intel Gears Up for FPGA Push

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Re: Intel Gears Up for FPGA Push

#21

Post by StillBored »

wmf wrote: post #17
StillBored wrote: post #16

Earlier quoted context omitted.

That is pretty much the ARM and POWER problem too, they think they can grow in new markets with these hugely expensive machines in quantities of ten racks. Both would have significantly more traction if they offered a reasonable desktop class machine, but they don't seem to be able to do it. For some reason there are dozens of RPi type devices but making a $200-$300 device with a reasonable set of expansion ports (sa…

Sadly, I suspect all the small developers combined are smaller than one hyperscale customer.

That may be true, but its the 1 huge customer vs a million little ones problem. Sure when you win the hyperscaler contract you hit the jackpot, but OTOH, when you don't you go out of businesses. Having a few thousand developers testing/optimizing/etc compilers/OSs/databases/web servers/etc all make it easier to win the hyperscaler contract, than spending months wondering why docker doesn't run correctly and loosing the contract.

So, a company may only be making a dollar on each machine sold, but is gaining thousands of hours of beta testing, or actual engineering in return.

I should add though, that this months basement hacker is next years businessman buying in lots of 5k to fulfill some small niche market. Do that enough times and eventually the next netflix/facebook app just happens to be running on your hardware.

Re: Intel Gears Up for FPGA Push

#22

Post by pm215 »

StillBored wrote: post #16
spaceseaman wrote: post #11

Earlier quoted context omitted.

> Oh wait you've forgotten how important it is to get a developer community started around your hardware cause it's been so long since the x86 was new! Intel: Huh? Developers? But they don't buy servers full of chips. Why do I have to sell to developers?

That is pretty much the ARM and POWER problem too, they think they can grow in new markets with these hugely expensive machines in quantities of ten racks. Both would have significantly more traction if they offered a reasonable desktop class machine, but they don't seem to be able to do it. For some reason there are dozens of RPi type devices but making a $200-$300 device with a reasonable set of expansion ports (sa…

The underlying problem here is that the cost of making an SoC is enormous. So to make, say, an ARM desktop class machine you have only a few choices:

1) Make your own SoC designed for the purpose. You can tailor it to meet your requirements precisely, but given the low volumes you'll be selling, your system will be at least $10,000 a box, likely more.

2) Use a designed-for-mobile SoC. This will hit your $200-$300 price point pretty easily (perhaps even sailing under it by a big margin), but the IO options will be bad, because mobile SoCs don't neeed SATA or PCIe. CPU performance is likely to be underwhelming because mobile SoCs are designed to hit a power consumption level that won't drain mobile batteries or make mobile devices overheat. Almost all the cheap devboards you can get today are in this category.

3) More recently we're starting to see server or networking SoCs, which gives you an option a bit like 2 but with different cost and expansion tradeoffs. Generally a bit more expensive than 2 because networking won't hit mobile volumes, but better I/O capability. CPU power may still be less than you might like. Examples here are the Macchiatobin board and the dev box that Socionext announced last week.

I don't think anybody disagrees that a proper desktop class machine for these architectures would be great; but there are huge economic barriers to getting there. Personally if I was looking at getting a new ARM setup I'd try something in class 2, likely the Socionext box when it becomes available (end of the year, I think they said).

Re: Intel Gears Up for FPGA Push

#23

Post by 0xbear »

microcolonel wrote: post #12
0xbear wrote: post #8

Earlier quoted context omitted.

The words Intel and “open” do not really belong in the same sentence.

Idunno, Xeon Phi, their GPUs since about 2007 (though a lot better recently), good cooperation and documentation with their NICs, direct participation in both major open compiler toolchains, all the stuff that 01.org lists... I think they're doing pretty well with open (aside from the products themselves, but that's kinda the point of having a company). Frankly Intel has done an adequate to good job of providing open…

You can’t even use their main product without loading in opaque binary blobs and agreeing to a backdoor.

Re: Intel Gears Up for FPGA Push

#24

Post by jcranmer »

katastic wrote: post #10

I've honestly been waiting for this since for YEARS. I've had a vision for "the future of computing". FPGAs that reconfigure themselves ( This would be hard for a single person, but any large company could handle making this. You can even do it with off-the-shelf FPGAs. The biggest problems are 1) bandwidth. The "macro" function size needs to be bigger than the latency hit you take for asking the FPGA over computing…

> The biggest problems are...

0) Trying to do automatic parallelization is something we've been working on for 50 years and we still haven't solved in any practical degree. You can't just slap a #pragma on C/C++ code at this point to say "run this on some non-CPU architecture" and expect to get good performance.

Re: Intel Gears Up for FPGA Push

#25

Post by chisleu »

zw123456 wrote: post #20

FPGA's are the shit but the software is the key. To make them really fly we need some really brilliant software to configure them. Someone is going to disrupt this space soon and whoever does I think will make a unicorn. Just my guess.

They bought one of the best hardware makers with one of the worst software platforms. I hope to all that is holy that they replaced the software entirely. What a nightmare those classes were...

Re: Intel Gears Up for FPGA Push

#26

Post by dragontamer »

pratumlabs wrote: post #6
0xbear wrote: post #3

This is so obviously not going to fly unless they either start bundling with Xeons, or offer something Xilinx can’t do. Cloud providers aren’t stupid, and there are enough eggs in the Intel basket already.

One of the key benefits of Intel's solution is that the CPU and FPGA share the same RAM, avoiding the O(N) cost of moving data to/from the devices. This type of a zero-copy transaction can enable very high performance applications compared with dedicated discrete cards.

AMD already does "Zero Copy transfers" (the on-chip cache!!) with its "Fusion" APUs (ex: A10-7850K) for CPU > GPU.

I'm not really seeing loads of people taking advantage of the feature however. The platform is cheap, the technology is available but its just way too weird an architecture to become mainstream.

There are numerous benefits: the CPU can create a linked list or graph, and the memory will still be valid on the GPU. CPU / GPU atomics are unified, and GPUs can even call CPU functions under AMD's HSA platform.

* https://images.anandtech.com/doci/7677/20%20-%20HSA%20Use%20...

* http://developer.amd.com/wordpress/media/2012/10/hsa10.pdf

* https://www.anandtech.com/show/7677/amd-kaveri-review-a8-760...

---------

I think Intel had a similar technology implemented on their "Crystalwell" chips, which were basically an L4 cache which provided a high-bandwidth link between the CPU and GPU (although not quite as flexible).

No, its not an FPGA, but OpenCL / GPGPU compute seems to be a bit more mainstream than FPGA compute at the moment. I haven't seen too much excitement in general for this feature however.

Re: Intel Gears Up for FPGA Push

#27

Post by visarga »

katastic wrote: post #10

I've honestly been waiting for this since for YEARS. I've had a vision for "the future of computing". FPGAs that reconfigure themselves ( This would be hard for a single person, but any large company could handle making this. You can even do it with off-the-shelf FPGAs. The biggest problems are 1) bandwidth. The "macro" function size needs to be bigger than the latency hit you take for asking the FPGA over computing…

> CPUs are designed for one thing "few, large, complex cases" while FPGAs are perfect for "many, parallel simple cases" even more than a GPU

Hmm, where have I heard something like this before ... ah, yes, the brain - CPUs/FPGAs are like reason and instinct, because reason deals with "few, large, complex cases" and instinct has "many, parallel simple cases". The brain has its own CPU/FPGA divide.

Re: Intel Gears Up for FPGA Push

#28

Post by balakk »

katastic wrote: post #10

I've honestly been waiting for this since for YEARS. I've had a vision for "the future of computing". FPGAs that reconfigure themselves ( This would be hard for a single person, but any large company could handle making this. You can even do it with off-the-shelf FPGAs. The biggest problems are 1) bandwidth. The "macro" function size needs to be bigger than the latency hit you take for asking the FPGA over computing…

MSR is attempting something similar as part of Project Brainwave:

https://h2rc.cse.sc.edu/slides/chiou_h2rc.pdf

Re: Intel Gears Up for FPGA Push

#30

Post by throwaway4590 »

burntrelish1273 wrote: post #13

The biggest problem with reconfigurable computing is it's either an afterthought, tools are too narrow/proprietary or an extra add-in card. Add a million LUTs and several thousand special-purpose blocks (ALUs, CAM, SRAM, DSPs, etc.) on CPU die that can be reconfigured within a few 10k cycles (ie process context), and then future AI-enabled optimizing compilers could incrementally profile and accelerate applications w…

There needs to be a marrying of software and hardware -- and processor instructions to support that. This is hierarchical reconfigurable cache-based architecture I designed a while ago at Intel; I doubt they have touched it but they do own it.

https://www.google.com/patents/US20170153892

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