Earlier quoted context omitted.
I am well aware of the architecture of the MIT CADR, LMI Lambda and TI Explorer, Symbolics lispms less so but they are not the subject of this thread. I have written CADR microcode recently. None of the features you list are constrained by the architecture of the hardware, they are just conventions of the software VM running on it. Would you suggest that the X86 is a tagged CPU architecture just because SBCL or a JVM…
If the X86 would provide SBCL with such instructions and data, it would be a tagged architecture, but it doesn't. The SBCL compiler outputs conventional X86 instructions. The Lisp Machine compiler OTOH generates instructions for a mostly stack machine, which runs on the CPU in microcode.
Please don't assume that all Lisp Machines were the same as Symbolics ones.