AMD is taking their lunch.
Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
11–20 of 247 posts
Re: Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
#12According to the table in the article: - 2011: 32nm - 2012: 22nm - 2014: 14nm - 2018?: 10nm I don't know much about foundry processes, but it seems that it's taking more and more time for lesser and lesser gains, right? At this rate, how long until we reach sub nanometer? What are the physical limits on these processes, and does it have any implications for end users? Will we be using 2nm CPUs for 50 years? Would lov…
widely assumed 5nm is the limit. I know i've seen others discuss some ideas around how close they can get, but i'm struggling to find the thread..
In any case, this may help:
https://en.wikipedia.org/wiki/5_nanometer
Found it.. http://semiengineering.com/will-7nm-and-5nm-really-happen/ and the HN discussion from several years ago: https://news.ycombinator.com/item?id=7920108
Re: Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
#13According to the table in the article: - 2011: 32nm - 2012: 22nm - 2014: 14nm - 2018?: 10nm I don't know much about foundry processes, but it seems that it's taking more and more time for lesser and lesser gains, right? At this rate, how long until we reach sub nanometer? What are the physical limits on these processes, and does it have any implications for end users? Will we be using 2nm CPUs for 50 years? Would lov…
The step from 14 to 10 nm is huge. Both from a technological perspective on the manufacturing side as well as on the effect it will have to the number of transistors on a die and the power consumption of those transistors. Remember that power consumption and the number of transistors are related to the surface area so there is a square factor in there. 14 nm ^2 = 196, 10 nm ^2 = 100, so that's almost a doubling of the number of transistors and approximately a halving of the power required per transistor for a given die area.
Re: Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
#14According to the table in the article: - 2011: 32nm - 2012: 22nm - 2014: 14nm - 2018?: 10nm I don't know much about foundry processes, but it seems that it's taking more and more time for lesser and lesser gains, right? At this rate, how long until we reach sub nanometer? What are the physical limits on these processes, and does it have any implications for end users? Will we be using 2nm CPUs for 50 years? Would lov…
There are various limits in play: https://www.extremetech.com/computing/97469-is-14nm-the-end-.... At sub-nanometer we're talking about features of 5-10 atoms across. At that scale you get effects like electrons quantum tunneling between transistors: https://www.theverge.com/circuitbreaker/2016/10/6/13187820/o.... We probably won't get there with existing silicon technology.
Re: Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
#15At this point real compute happens on the GPU. I think we'll see a shift to major apps being driven by GPGPU. The CPU's performance has started matter less and less.
That's just simply not true. The 'real computation' happening on GPUs is either very heavy floating point work or graphics related work, almost everything else is running on the CPU.
Re: Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
#16At this point real compute happens on the GPU. I think we'll see a shift to major apps being driven by GPGPU. The CPU's performance has started matter less and less.
What do you mean by major apps? Do you have some reason to believe that apps will suddenly become embarrassingly parallel? Major apps often don't even take full advantage of SIMD instructions on the CPU. As soon as you need a context switch, branching, or fast memory access your GPU is crap.
GPUs are only good at _very_ specific workloads.
Re: Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
#17At this point real compute happens on the GPU. I think we'll see a shift to major apps being driven by GPGPU. The CPU's performance has started matter less and less.
Right on. Core speeds are not getting any faster. Chips with thousands of cores are the future. Intel is way behind in this area
Re: Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
#18According to the table in the article: - 2011: 32nm - 2012: 22nm - 2014: 14nm - 2018?: 10nm I don't know much about foundry processes, but it seems that it's taking more and more time for lesser and lesser gains, right? At this rate, how long until we reach sub nanometer? What are the physical limits on these processes, and does it have any implications for end users? Will we be using 2nm CPUs for 50 years? Would lov…
There are various limits in play: https://www.extremetech.com/computing/97469-is-14nm-the-end-... . At sub-nanometer we're talking about features of 5-10 atoms across. At that scale you get effects like electrons quantum tunneling between transistors: https://www.theverge.com/circuitbreaker/2016/10/6/13187820/o... . We probably won't get there with existing silicon technology.
I read on HN, a couple months ago, these numbers no longer represent the physical size of anything but are now just a marketing label, a sort of 'performance equivalent to a theoretical size of'.
Anyone know if there's any truth to this? Might try to find the comment later when I have time.
Re: Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
#19Earlier quoted context omitted.
There are various limits in play: https://www.extremetech.com/computing/97469-is-14nm-the-end-... . At sub-nanometer we're talking about features of 5-10 atoms across. At that scale you get effects like electrons quantum tunneling between transistors: https://www.theverge.com/circuitbreaker/2016/10/6/13187820/o... . We probably won't get there with existing silicon technology.
I read on HN, a couple months ago, these numbers no longer represent the physical size of anything but are now just a marketing label, a sort of 'performance equivalent to a theoretical size of'. Anyone know if there's any truth to this? Might try to find the comment later when I have time.
I don't have any direct experience with "deep submicron" stuff, but from what I've read you basically can't trust these numbers to be comparable. The various sizes/spacings don't scale together the way they did for larger feature sizes, so you could have e.g. a "14nm" process where the area of an SRAM cell, NAND gate etc. ends up the same size as another foundry's "20nm" process even though the actual transistors are smaller.
Re: Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake
#20Earlier quoted context omitted.
There are various limits in play: https://www.extremetech.com/computing/97469-is-14nm-the-end-... . At sub-nanometer we're talking about features of 5-10 atoms across. At that scale you get effects like electrons quantum tunneling between transistors: https://www.theverge.com/circuitbreaker/2016/10/6/13187820/o... . We probably won't get there with existing silicon technology.
I read on HN, a couple months ago, these numbers no longer represent the physical size of anything but are now just a marketing label, a sort of 'performance equivalent to a theoretical size of'. Anyone know if there's any truth to this? Might try to find the comment later when I have time.
Intel's are actual measurements. TSMC, GF, and samsung are all marketing bs.