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Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

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Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#41

Its like we have all collectively forgotten that the first release of a hardware or software project is just an expensive beta. I don't buy 1st gen microarches because i'm not interested in paying top dollar to be a tester. What I find odd, is that apparently both intel and AMD have also forgotten this, as Intel seems to be moving toward making their enterprise customers the beta testers, while AMD seems so desperate…

I got used to the idea of staying away from the cutting edge in the early 2000's. The original Athlon and Thunderbird processors were groundbreaking in performance, but consumer cooling and PSU design had not caught up with their power and heat output demands - the result was uncomfortably noisy and hot at best. The high end parts really are like Ferraris in that they do take more of your time and care to deal with i…

What do you do with it?

I'm not really all that big a fan of APUs, their niche is decent integrated graphics cheap, but for low-end serveresque or office-box usage I'd go with the Pentium G4560. It has ECC too if that's your thing. Rumors are that 4C8T i3s may be coming with Coffee Lake too - obviously no efficiency step up but it'll be price competitive with Ryzen (right now the i3s and locked i5s usually aren't good value).

You can sometimes still find X99 stuff on clearance too - the 5820K and 6800K are essentially power- and performance-competitive with Ryzen 5 in all respects, plus you also get quad-channel RAM and more lanes, the caveat being they're usually more expensive than Ryzen 5. But, they're also mature at this point, and v3 Xeons should even be starting to come out from server farms within a year or two.

The bigger Coffee Lake parts will be tinkerer's specials. You'll need to delid for sure, I totally bet Intel isn't going to do shit about the TIM problem on SKL-X. It's probably going to be nearly as big a die as X99 was anyway, if they could possibly manage to solder it they really need to do it. Either way it's going to eat a lot of power, but they should be fast. Kaby with more cores is a pretty potent formula.

Of course there's no guarantees, SKL-X turned out to be shit for gaming.

Normally Ryzen 5 and 7 dominate the value charts here of course. Intel's products are really only compelling for people who game at the moment. X99 is good, the 7700K is good, the 7600K is good (really guys, hyperthread only gets you roughly ~10% average speedup in games). The 7350K can be OK for ricer low-end builds - if your game of choice is single-threaded (virtually any Source game) it really cooks, and Microcenter has it for $130 (minus a $30 bundle discount if you want a mobo). The G4560 (2C4T) was a value changer for Intel in the low-end market, it's a good office box and it has ECC support for light server usage too. There are rumors Intel is choking down on production because it's eating up i3 sales, which is hilarious, because a price cut is exactly what 2C4T needs.

But really, if you count out Ryzen and Threadripper that leaves Bulldozer, Fusion processors, and Intel products. Bulldozer is mature but slow and hot and really only works well on things like video encoding. Fusion is a laptop processor, and the Pentium beats it. Intel has nothing worthwhile in the "boring office box" category between the G4560 and the X99 range, their consumer stack is almost only relevant in gaming otherwise.

Yeah, I was super bummed when I heard Threadripper was going to be on the older stepping. Otherwise I'd be really interested in it (especially with official ECC support). That would be a sick little server box. I'm thinking about doing a NAS build on X99 instead - I can build something basically the size of a DS1817+ but with 2x16 lane single slots free for NVMe sleds/infiniband.

https://pcpartpicker.com/list/dBPWqk The other thing is I'd love to see more done with Kabini. There definitely is a place for very cheap shitbox computers - you used to be able to get a AM1 mobo + Athlon 5350 CPU for $40 together, you could do a full low-end build for $200. I was really disappointed to see it go. The CPU supports ECC but none of the motherboards do, give me an ECC mITX server board with an onboard SAS controller! It would be very competitive with the Avoton C2550/C2750 line (which are randomly shitting themselves nowadays unfortunately...) and could be used for NAS appliances. DDR3 is dead now... but Kabini can support DDR3L.

Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#42
post #16
post #5

> When a cpu-thread stalls in this manner it appears to stall INSIDE the microcode for IRETQ. It doesn't make it to the return pc, and the cpu thread cannot take any IPIs or other hardware interrupts while in this state. So maybe fixable with a microcode update?

Most cpu errata are. (Most of the rest are ignorable).

Aren't microcode updates usually "disable some feature" updates?

Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#43
post #29

Its like we have all collectively forgotten that the first release of a hardware or software project is just an expensive beta. I don't buy 1st gen microarches because i'm not interested in paying top dollar to be a tester. What I find odd, is that apparently both intel and AMD have also forgotten this, as Intel seems to be moving toward making their enterprise customers the beta testers, while AMD seems so desperate…

AMD's not doing a recall, it works decently enough for most applications. Their response is going to be "if it crashes your application, turn SMT off". Consider they didn't even do a recall when Phenom had a showstopping TLB bug, they shipped a BIOS patch that disabled TLB entirely. And remember, Epyc is on a new stepping of the silicon, it's possible this is already fixed on it. (Threadripper is not, however)

TLB, As Translation Lookaside Buffer? Won't memory access slow down dramatically if that is disabled?

Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#44
post #41

Earlier quoted context omitted.

I got used to the idea of staying away from the cutting edge in the early 2000's. The original Athlon and Thunderbird processors were groundbreaking in performance, but consumer cooling and PSU design had not caught up with their power and heat output demands - the result was uncomfortably noisy and hot at best. The high end parts really are like Ferraris in that they do take more of your time and care to deal with i…

What do you do with it? I'm not really all that big a fan of APUs, their niche is decent integrated graphics cheap, but for low-end serveresque or office-box usage I'd go with the Pentium G4560. It has ECC too if that's your thing. Rumors are that 4C8T i3s may be coming with Coffee Lake too - obviously no efficiency step up but it'll be price competitive with Ryzen (right now the i3s and locked i5s usually aren't goo…

Someone was chatting to me today about picking up X5670 cpus for $50-$60. Compared to my 6600K they seem quite competitive: http://ark.intel.com/compare/83352,88191,47920

Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#45
post #29

Earlier quoted context omitted.

AMD's not doing a recall, it works decently enough for most applications. Their response is going to be "if it crashes your application, turn SMT off". Consider they didn't even do a recall when Phenom had a showstopping TLB bug, they shipped a BIOS patch that disabled TLB entirely. And remember, Epyc is on a new stepping of the silicon, it's possible this is already fixed on it. (Threadripper is not, however)

TLB, As Translation Lookaside Buffer? Won't memory access slow down dramatically if that is disabled?

Yup, and it did: http://techreport.com/review/13741/phenom-tlb-patch-benchmar...

Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#46
post #41

Earlier quoted context omitted.

What do you do with it? I'm not really all that big a fan of APUs, their niche is decent integrated graphics cheap, but for low-end serveresque or office-box usage I'd go with the Pentium G4560. It has ECC too if that's your thing. Rumors are that 4C8T i3s may be coming with Coffee Lake too - obviously no efficiency step up but it'll be price competitive with Ryzen (right now the i3s and locked i5s usually aren't goo…

Someone was chatting to me today about picking up X5670 cpus for $50-$60. Compared to my 6600K they seem quite competitive: http://ark.intel.com/compare/83352,88191,47920

You can also buy used Xeon workstations and put in a new GPU card. The main problem is that the cooling isn't especially quiet, and they have proprietary motherboards and power supplies.

Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#47
post #29

Its like we have all collectively forgotten that the first release of a hardware or software project is just an expensive beta. I don't buy 1st gen microarches because i'm not interested in paying top dollar to be a tester. What I find odd, is that apparently both intel and AMD have also forgotten this, as Intel seems to be moving toward making their enterprise customers the beta testers, while AMD seems so desperate…

AMD's not doing a recall, it works decently enough for most applications. Their response is going to be "if it crashes your application, turn SMT off". Consider they didn't even do a recall when Phenom had a showstopping TLB bug, they shipped a BIOS patch that disabled TLB entirely. And remember, Epyc is on a new stepping of the silicon, it's possible this is already fixed on it. (Threadripper is not, however)

Epyc crashes quite often, see segfault screen shot.

https://www.reddit.com/r/Amd/comments/6rmq6q/epyc_7551_minin...

Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#48
post #37

I hoped this just affected Ryzen CPUs, but this Reddit post indicates that it affects Epyc also: https://www.reddit.com/r/Amd/comments/6rmq6q/epyc_7551_minin... The first post on on AMD's community forum ( https://community.amd.com/thread/215773?start=0&tstart=0 ) is almost three months old, so AMD have known about this for a long time. If it's not something that can be fixed in a UEFI update, then it's bad news for…

So he's got a segfault every couple of minutes, wow... I've been running the same test for over 4 hours now on my Ryzen 1700 (and I've had several uneventful 30-40 minute runs before). To date, I only got one "internal compiler error: Illegal instruction" but no segfaults. Whatever it is, it doesn't affect every chip the same way.

> Whatever it is, it doesn't affect every chip the same way.

Such uncertainty is bad. segfault is not the only issue, the risk of having some interally corrupted data is the biggest risk.

I've stopped using the Ryzen junk I bought on its release day.

Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#49
post #23
post #10

Not the first bug reported for Ryzen. Wasn't there a couple of others too, one with linux locking up and another triggered by the ocaml compiler emitting opcodes refering AH/BH/CH/DH registers in a tight loop? Edit: Sorry, the ocaml bug was Intel Skylake. It's interesting how so many new CPUs have breaking bugs. Feels like it's been quiet since the original pentium F00F bug and then all of a sudden everyone's new CPU…

> It's interesting how so many new CPUs have breaking bugs. Dan Luu observed the same thing, and thinks it will continue to be very likely: https://danluu.com/cpu-bugs/

cool article, thanks a lot for sharing.

it mentions something that I really worried about - Intel knowingly requested its own validation efforts to be reduced so they can place half baked products onto the market faster. pretty sad that both Intel/AMD are seem to be cutting corners to just be a little bit faster in the competition.

Re: Ryzen CPU HyperThreads break if 100% busy and interrupted to top of Memory

#50
post #42
post #16

Earlier quoted context omitted.

Most cpu errata are. (Most of the rest are ignorable).

Aren't microcode updates usually "disable some feature" updates?

No. That's exceptionally rare and the worst case scenario. See Intel and TSX (transactional memory).
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