Hacker News Board Hacker News, browsed like a classic message board
Live data from Hacker News

All AMD ThreadRipper CPU's will have 64 PCIe Lanes

anandtech.com

Post reply on HN
Print view View original

131–140 of 144 posts

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#131

Post by marssaxman »

beagle3 wrote: post #106
nicktelford wrote: post #14

Earlier quoted context omitted.

I doubt we'll be seeing desktop ARM systems any time soon, especially high end workstation or enthusiast systems. The problem is that the ARM64 architecture is completely different from x86-64, which almost every desktop application is compiled for exclusively . Remember when Microsoft launched an ARM Surface? It had a special version of Windows, and almost nothing would run on it, as very few applications are compil…

That's why an ARM64 Windows desktop is unlikely (unless microsofts x86 emulator is magical). But ARM64 chrome books or android books are practical; I have 5 year old ARM 32 chrome book and it is still useful for browsing and emailing.

Why restrict it to those limited OSes? Seems like an ARM64 laptop running Linux ought to work just as well as the AMD64 laptops running Linux I've been using for the last few years.

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#132

Post by drewg123 »

maksimum wrote: post #129
drewg123 wrote: post #108

Earlier quoted context omitted.

I do a lot of compiles of a codebase which is pretty big (Netflix version of FreeBSD). A full recompile takes me ~1 hr on my box (Xeon E5-2630 v3, 8 cores, 16 threads, 32GB DDR4). Most of this is a parallel make that is 100% CPU bound. So I'm probably going to update to thread ripper when it comes out. Doubling my core count should come close to halving my compile times. I probably will do storage via a ZFS array of…

> A full recompile takes me ~1 hr Could you explain why full recompiles on a single machine are necessary? Are you testing different compiler settings?

I work remotely, and it is easier to develop and compile on the same box. I normally compile just the kernel, but occasionally have to rebuild the entire thing.

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#133

Post by yazr »

drewg123 wrote: post #108
hishnash wrote: post #69

Earlier quoted context omitted.

Gamers might the most vocal high-end PC users out there but they are not the people with the most money. The threadripper is not targeted at gamers. It is targeted at people who make money from using their machines, these people can, therefore, afford to upgrade. Consider a user who does video work. (most modern films and tv is filmed in 8k know) if this is in Raw format as it comes off the camera for a 90 min episod…

I do a lot of compiles of a codebase which is pretty big (Netflix version of FreeBSD). A full recompile takes me ~1 hr on my box (Xeon E5-2630 v3, 8 cores, 16 threads, 32GB DDR4). Most of this is a parallel make that is 100% CPU bound. So I'm probably going to update to thread ripper when it comes out. Doubling my core count should come close to halving my compile times. I probably will do storage via a ZFS array of…

What makefile/build system r u using ?

I am curious since i did some work on parallel builds and I always wonder how much of this is (easily) transferable to other setups...

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#134

Post by shaklee3 »

floatboth wrote: post #128
shaklee3 wrote: post #45

Earlier quoted context omitted.

Maybe for games, but for cuda this is certainly not the case. Double the lanes is double the host to device bandwidth.

"CUDA" is not a particular application. You could very well be doing something with CUDA that does extremely little data transfer to/from the host, but a lot of computation on the GPU. Like mining :D Also, host to device can be bottlenecked by memory speed on either side.

CUDA meaning GPGPU. All I was pointing out is that there is definitely a bandwidth doubling going from 8 to 16 lanes. It's used extremely often by people using the cards for compute. Mining may not have that issue, but deep learning and other applications do.

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#135

Post by drewg123 »

yazr wrote: post #133
drewg123 wrote: post #108

Earlier quoted context omitted.

I do a lot of compiles of a codebase which is pretty big (Netflix version of FreeBSD). A full recompile takes me ~1 hr on my box (Xeon E5-2630 v3, 8 cores, 16 threads, 32GB DDR4). Most of this is a parallel make that is 100% CPU bound. So I'm probably going to update to thread ripper when it comes out. Doubling my core count should come close to halving my compile times. I probably will do storage via a ZFS array of…

What makefile/build system r u using ? I am curious since i did some work on parallel builds and I always wonder how much of this is (easily) transferable to other setups...

A modified version of the standard FreeBSD build, with bsd make. Eg, a script driven 'make -j X buildworld && make -j X buildkernel'

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#136

Post by nbanks »

twoodfin wrote: post #49
theandrewbailey wrote: post #43

Earlier quoted context omitted.

A lot of processing happens when games load. Once you have sufficient storage bandwidth and latency, load times flatten out. It seems that "sufficient" is SATA; above that, there is little difference in game load times: https://techreport.com/review/29221/samsung-950-pro-512gb-ss...

I wonder if game developers are actually disincentivized from qualitatively improving load times past a certain acceptable threshold, lest their AAA game be perceived as lightweight.

Reminds me of the first time I played Kings Quest from a RAM drive. I first played the game from a floppy disk, and it ways really nice to have everything load instantly!

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#137

Post by TazeTSchnitzel »

masklinn wrote: post #66
TazeTSchnitzel wrote: post #64

Earlier quoted context omitted.

Ah, so the high-end ThreadRipper would contain the same chips as a high-end Epyc, just twice as many, and likewise for the lower-end variants, I guess? That makes sense.

> just twice as many Half. Epyc gets 4 MCM[0], ThreadRipper gets 2 (with each MCM containing 8 Ryzen cores) [0] https://en.wikipedia.org/wiki/Multi-chip_module

Uh, right. Got it the wrong way round.

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#138

Post by beagle3 »

marssaxman wrote: post #131
beagle3 wrote: post #106

Earlier quoted context omitted.

That's why an ARM64 Windows desktop is unlikely (unless microsofts x86 emulator is magical). But ARM64 chrome books or android books are practical; I have 5 year old ARM 32 chrome book and it is still useful for browsing and emailing.

Why restrict it to those limited OSes? Seems like an ARM64 laptop running Linux ought to work just as well as the AMD64 laptops running Linux I've been using for the last few years.

I've been using Linux on my desktop (without windows even in a VM) since 2004 and I totally agree - however until Linux is considered a viable option by non-enthusiasts, it's not relevant to this discussion. (I agree it is already relevant and more useful than Windows for the vast majority - but they refuse to even try)

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#139

Post by Quequau »

redtuesday wrote: post #56
Quequau wrote: post #29

Earlier quoted context omitted.

Some years ago I read a moderately well fleshed out proposal to create a European semiconductor consortium as a sort of an Airbus for CPUs. My recollection is that, while it was somewhat flawed, it was an idea with significant merit.

They should do the same for software companies that produce software for the governments, with the requirement to open source the software.

Absolutely yes.

These large open source code bases represent huge value stores for modern civil societies. We're all better off because they exist and we'd do well to promote them.

Re: All AMD ThreadRipper CPU's will have 64 PCIe Lanes

#140

Post by geiseric »

Does any remember the DEC Alpha? Windows NT 4.0 was ported to it. The Alpha was a 64-bit RISC processor. (Reduced Instruction Set Computer) An ARM is just an Advanced RISC Machine. RISC architecture has an instruction execution advantage over CISC (Complex Instruction Set Computer) that is what Intel is famous for. Although they did have a i860 and i960 RISC which many of them were for embedded military systems.

Other RISC systems were from Silicon Graphics, with their MIPS processor were used for 3D graphic processing. RISC has shown that it has its place in the computing world time and time again.

My personal appeal is their low power requirements and compact designs. Obviously cell phone manufactures like it too for the same reasons.

Post reply on HN