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Open-source chip RISC-V to take on closed x86, ARM CPUs

computerworld.com.au

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Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#141

Post by microcolonel »

sweden wrote: post #135
sangnoir wrote: post #124

Earlier quoted context omitted.

From where I'm standing, it looks like you're shifting goalposts: > > RISC-V is thrown around like if it's an already working CPU but it is not (Evidence of existing CPUs provided) > I am aware that they exist but it's not like companies are going to actively invest in devices for the end consumer purely based on RISC-V.

My point is, you can't get those existing CPUs for free.

What kind of for free are you talking? The first commercial run RISC-V microcontroller SoC has fully-published RTL, and a company which will support you in adding it to your products (SiFive). Obviously people aren't going to give you the manufactured chips for free, but how close do you want it?

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#143

Post by sherincall »

pjmlp wrote: post #125
rjsw wrote: post #113

Earlier quoted context omitted.

NVidia are using RISC-V in their GPU designs.

Where can I read more about it?

- https://riscv.org/wp-content/uploads/2016/07/Tue1100_Nvidia_...

- https://www.phoronix.com/scan.php?page=news_item&px=NVIDIA-R...

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#144

Post by TheOtherHobbes »

tssva wrote: post #104
sweden wrote: post #80

Earlier quoted context omitted.

RISC-V is thrown around like if it's an already working CPU but it is not. It is just a document describing an ISA, you can't compare it to Linux, it's a completely different thing. There are a lot of costs in implementing an ISA and that includes: design, functional verification, physical implementation and software testing. All those steps together will require hundreds and hundreds of engineers, many expensive too…

Linux didn't instantly become something you could download from kernel.org, compile overnight and get it booting right away. It took hundreds and hundreds of developers, thousands of man hours, financial investments from a large number of companies worldwide and many many years for Linux to become what it is today. All of this done while there were several existing commercial Unix variants which could have been licen…

Linux is still a hobby OS. It's not a particularly wonderful example of software engineering. Its only real benefit is that it's free and comes with an ecosystem of other free software that kind of mostly works as long as you don't mind the occasional security horror, and can be used as-is or customised at relatively low cost.

That combination of features makes it appealing in a variety of business cases - for business reasons.

RISC-V can't be customised at relatively low cost. It's nominally free, but the freeness doesn't mean much in a business setting.

The total cost of developing a custom core remains beyond the reach of small companies.

Big companies already know there's an established ARM ecosystem with working compilers and a simple, risk-free, and relatively affordable business model.

So what business problem does RISC-V solve?

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#145

Post by alkoumpa »

sidereal wrote: post #36
alkoumpa wrote: post #5

I wonder how of those fit in a zedboard. (not going to ask how many hours of tool fighting that would require though).

Running on a Zedboard is quite well documented; only took me a couple of hours to do it from scratch following their instructions: https://github.com/ucb-bar/fpga-zynq

I meant in a SIMT fashion, more like a GPU

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#146

Post by Recurecur »

TheOtherHobbes wrote: post #144
tssva wrote: post #104

Earlier quoted context omitted.

Linux didn't instantly become something you could download from kernel.org, compile overnight and get it booting right away. It took hundreds and hundreds of developers, thousands of man hours, financial investments from a large number of companies worldwide and many many years for Linux to become what it is today. All of this done while there were several existing commercial Unix variants which could have been licen…

Linux is still a hobby OS. It's not a particularly wonderful example of software engineering. Its only real benefit is that it's free and comes with an ecosystem of other free software that kind of mostly works as long as you don't mind the occasional security horror, and can be used as-is or customised at relatively low cost. That combination of features makes it appealing in a variety of business cases - for busine…

"Linux is still a hobby OS. It's not a particularly wonderful example of software engineering. Its only real benefit is that it's free and comes with an ecosystem of other free software that kind of mostly works as long as you don't mind the occasional security horror, and can be used as-is or customised at relatively low cost."

That is complete nonsense. Linux, particularly Red Hat Enterprise Linux is as serious of a server OS as exists in the world today. Companies like IBM and Oracle would never embrace a "hobby" OS in an enterprise setting.

As for "occasional security horrors", sadly there is no OS of any flavor that is immune.

"So what business problem does RISC-V solve?"

For one thing, RISC-V offers the promise of fully open computer systems, without opaque black boxes anywhere providing potential back doors or other problems. The Intel AMT vulnerability is an excellent example of how that can go very wrong:

https://www.ssh.com/vulnerability/intel-amt/

RISC-V also provides a playground for smaller entities (like university labs) wishing to experiment with innovative new hardware techniques like Unums. That's very valuable in its own right.

http://web.stanford.edu/class/ee380/Abstracts/170201-slides....

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#147

Post by restalis »

So many RISC options and almost none for CISC. If you want yet another low power chip, then it makes sense. If, however, you want to get real on efficient cache usage and a high instruction-per-execution ratio, just do yourself a favor and stop ignoring the costly experimenting results that the industry already paid for.

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#148

Post by FullyFunctional »

sweden wrote: post #88
jbarham wrote: post #83

Earlier quoted context omitted.

In that comment you say "RISC-V is thrown around like if it's an already working CPU but it is not" which is false since there are multiple existing, functioning RISC-V implementations in silicon ( https://www.sifive.com/products/freedom/ ), FPGAs and software ( https://bellard.org/riscvemu/ ). Most people on HN should understand the difference between an ISA specification and its implementation in silicon.

The tone of your comment is very unfortunate taking into account the content of it. The second like you showed is just a simple FPGA implementation, you can't really use for ASIC designs. The first one is a completely different implementation by a different company. And they are not really providing the whole source. I challenge you to find a place to download their designs yourself. I will be waiting.

The second is real silicon. I have a couple. But all this talk is missing the point. For companies looking to design a product for which the processors is a means to an end, RISC-V holds a tremendous time-to-market advantage and full complete control of your own destiny. That, more than anything, will matter for the 1st wave of adopters. (RV has other technical merits that you for some reason discount).

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#149

Post by FullyFunctional »

posterboy wrote: post #123

What is so special about reduced ISAs, what's the differentiating factors between them? I mean they are so reduced that the ones I've seen are largely the same few logic ops. RAM access and interrupts might differ some, but a) memory access should follow the implementation and b) essentially everything else is memory mapped (avr, c51, pic)

To fully appreciate this, one would need much experience with microprocessor implementation. It's not reduced for the point of being simpler or smaller, but because it represent a local optimum of perf/area for running C code, especially for small to medium implementations.

However, much like the Alpha, RISC-V has been carefully designed to be efficient to scale UP, that is, to superscalar out-of-order implementations.

Do read the spec and the footnotes; they are delightful: https://raw.githubusercontent.com/riscv/riscv-isa-manual/mas...

Re: Open-source chip RISC-V to take on closed x86, ARM CPUs

#150

Post by FullyFunctional »

jlebrech wrote: post #142

would there be a advantage to not only creating a reduced instruction set but a minimal instruction set and letting the compiler do the rest. especially when you can add a lot more cores, so that mul becomes a cpu core with a counter and add for example.

No.
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