I look forward to a RISC-V proc powering my laptop with some ridiculous Nvidia GPU. We must escape x86 :(
There is some gentle irony in wanting an open source ISA CPU paired with a GPU so proprietary the ISA is not even public knowledge.
Open-source chip RISC-V to take on closed x86, ARM CPUs
121–130 of 157 posts
Re: Open-source chip RISC-V to take on closed x86, ARM CPUs
#122I see on this thread a lot of people getting blind-folded by the "open-source" term attached to the headline of this article. First of all RISC-V can mean more than one thing: it can refer to the architecture, which is in fact open and free to use, or it can refer to the implementation of the same architecture, which will not be necessarily free or open source. For example, check the so claimed SiFive company which w…
> You don't need to be completely tied to ARM. The point is that if you want to use the ARM ISA you have to pay ARM. Not so with RISC-V. Anyone is free to fab a RISC-V chip without paying royalties.
A lot of the interest behind open ISAs like RISC-V isn't from a cost perspective, because most people recognize that the cost differences are negligible.
They want to avoid the Intel scenario, where a company controls an ISA that industries depend on, and can force their ideology on implementing silicon for whatever ends they want.
ARM, being proprietary and controlled by the company can do the same. If you want a specific part built, you need the permission of ARM to do anything involving the ISA.
If you are going to build all civilization on the top of an ISA, it can't be reasonable to subjugate that ecosystem to the whims of one board of directors.
Re: Open-source chip RISC-V to take on closed x86, ARM CPUs
#123What is so special about reduced ISAs, what's the differentiating factors between them?
I mean they are so reduced that the ones I've seen are largely the same few logic ops. RAM access and interrupts might differ some, but a) memory access should follow the implementation and b) essentially everything else is memory mapped (avr, c51, pic)
Re: Open-source chip RISC-V to take on closed x86, ARM CPUs
#124Earlier quoted context omitted.
When I did a presentation on RISC-V last year I counted 6 real implementations (full custom ASICs). Now granted only one or two of those you can buy, the others are research projects, but they do exist and they did produce real silicon. This year we should see a couple of 64 bit implementations, which is when it'll get really interesting. There are of course multiple FPGA implementations (I have one about 2 feet away…
I am aware that they exist but it's not like companies are going to actively invest in devices for the end consumer purely based on RISC-V.
From where I'm standing, it looks like you're shifting goalposts:
> > RISC-V is thrown around like if it's an already working CPU but it is not
(Evidence of existing CPUs provided)
> I am aware that they exist but it's not like companies are going to actively invest in devices for the end consumer purely based on RISC-V.
Re: Open-source chip RISC-V to take on closed x86, ARM CPUs
#125Re: Open-source chip RISC-V to take on closed x86, ARM CPUs
#126Earlier quoted context omitted.
I see that what they recommend for the freedom platform https://www.sifive.com/products/freedom/ today, is a dev board https://dev.sifive.com/freedom-soc/evaluate/fpga/ that costs around 3500 USD: https://www.avnet.com/shop/us/p/kits-and-tools/development-k... Do anyone here know what kind of "classic pc" performance one is likely to get out of a board like that? Could you get on the order of low-end pc (~500 dollar…
A somewhat speed-optimized IP CPU core [1] runs at 600DMIPs on a Virtex7. I would hope that SiFive is in the same ballpark, but it's probably slower. Even in a best-case scenario, this is nowhere near a low end consumer PC. edit: For reference, my 5 years old Thinkpad x230 does around 7400 DMIPs per core. [1] - https://www.xilinx.com/products/design-tools/microblaze.html
Well, that actually sounds a lot better than I feared - I have a aging aspire acer one that works fine as a lightweight Linux desktop.
Re: Open-source chip RISC-V to take on closed x86, ARM CPUs
#127Earlier quoted context omitted.
> RISC-V is amenable to a wide array of microarchitectural decisions As is ARMv8. Applied Micro, Broadcom, Cavium, Huawei, Nvidia, AMD, Samsung and Apple are all architectural licensees with radically different microarchitectural implementations. For example, Nvidia is Transmeta code-morphing style implementation. Also, Intel and AMD continue to innovate in the x86 space. At this date, RISC-V has no fundamental advan…
NVIDIA's Denver is a feat; I think that if it says anything, it's that ARM's instruction encoding is deficient. AArch64 instruction encoding is less dense than AMD64, and completely lacks compressed instructions (like Thumb). To NVIDIA, it made more sense for them to write a realtime binary translator for an internal ISA which is clearly enabling their microarchitecture more than ARM is. AMD and Intel spend more mone…
That's a good point about Nvidia adopting RISC-V. I didn't know that but for their application it's a good idea.
I'm not a Denver fan and at this point I think we can safely say Code Morphing has been tried. However, I wouldn't conclude that Denver means that ARM's instruction encoding is deficient. The optimizations that Denver provides would be impractical in any ISA.
Moreover architectures are meant to be implemented+optimized in many ways. You may not like x86 but planting that flag in the sand allowed Intel to innovate on the microarchitecture side while developers innovated on the application side knowing that x86 would still be there. It's the same value proposition that IBM offered with the original architecture, System 360.
Where I like x86 and where I don't like RISC-V is that x86 doesn't try to be perfect but rather to adapt over time. RISC-V tries to be perfect and indeed eschews many of the bad RISC ideas from the past (register windows, branch delay slots, tagged integers, ...) while then pig headedly avoiding an obvious feature shared by both x86 and ARM, condition codes. I've read their argument and found it unconvincing. Original ARM had way too much condition code support. I think ARMv8 strikes a nice balance that RISC-V should have followed.
The HP+Intel Itanium effort allowed AMD to propose their AMD64 extensions. That's been quite successful. I wish they'd taken the opportunity to trim more cruft. When ARM went 64b with ARMv8, they took that opportunity and the result is quite clean. I prefer it to RISC-V although I haven't written any RISC-V assembly.
ARMv8 tries to be a good instruction set architecture. To me, RISC-V tries to be the platonic ideal RISC ISA. I'll go with good.
Re: Open-source chip RISC-V to take on closed x86, ARM CPUs
#128Earlier quoted context omitted.
> You don't need to be completely tied to ARM. The point is that if you want to use the ARM ISA you have to pay ARM. Not so with RISC-V. Anyone is free to fab a RISC-V chip without paying royalties.
A lot of the interest behind open ISAs like RISC-V isn't from a cost perspective, because most people recognize that the cost differences are negligible. They want to avoid the Intel scenario, where a company controls an ISA that industries depend on, and can force their ideology on implementing silicon for whatever ends they want. ARM, being proprietary and controlled by the company can do the same. If you want a sp…
This is one of the few sensible comments in this thread and explains exactly why RISC-V is important.
Re: Open-source chip RISC-V to take on closed x86, ARM CPUs
#129Earlier quoted context omitted.
It's written in C. Why not a general purpose OS?
There are important people at Microsoft who basically get very confused about what "x86" or "arm" means. There was a contingent that decided allowing third parties to port win32 apps with a recompile was off the table (despite it being very doable - just look at explorer or notepad running on surface rt), and to this day whenever many MS folks make public statements about windows on arm they sound hopelessly confused…
Important people don't know what underlying hardware their software runs on? I mean it's not that hard to figure that out... I hope they're not just parroting what others tell them.
Re: Open-source chip RISC-V to take on closed x86, ARM CPUs
#130Earlier quoted context omitted.
> Just getting a license from ARM is 10+ million dollars. Which license? ARM offers several different models. > Apple creates their own CPU and GPU designs, Google has custom hardware for machine learning, and Samsung is about to overtake Intel as the world's largest chip manufacturer. Why should they keep shelling out billions to ARM, Intel, and AMD just to use their ISA? The Google hardware we know (TPU) for learni…
Well, a 10 million dollar license is nothing of you factor the Fab costs
$10 million is approximately the cost of a mask set even on the cutting edge fabs.