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Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

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Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#171
post #22
post #15

Earlier quoted context omitted.

You forgot that Intel bought Nervana Systems last year, right before IDF. They develop custom ASIC processors for machine learning.

Which doesn't necessarily mean anything for Intel's future in machine learning. Intel bought an ARM chip maker before, too, and because of internal conflict of interest with the x86 group, it ended-up killing the ARM division. Will the same happen to other non-x86 groups? Who knows. But we also see that even Intel's previous "accelerator" divisions have moved focus to being "CPU-driven" as well (Xeon Phi), so we have…

> I also remember some of the articles from a decade ago that were sure Intel's "might" would help it succeed in the mobile market.

You don't even have to look that far back. As recently as two years ago, I remember comments here proclaiming with certainty that Intel would crush ARM because they had finally broken through the power wall.

I think a lot of folks, Intel included, have a strong belief in the inevitability of x86 dominance. But ultimately most of the inherent value of x86 is compatibility with Windows software (and DOS before it). Take that away and a lot of the advantages disappear. (Not to downplay the impressive technical and process achievements Intel has made, of course...)

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#172
post #15

From what I gather online, intel is entering into an exestential crisis as homegrown chips and GPUs are replacing CPUs in the battle for tomorrow's data center. All of the interesting research from Google and others all have one thing in common: a custom asic processor.

You forgot that Intel bought Nervana Systems last year, right before IDF. They develop custom ASIC processors for machine learning.

They also bought Movidius.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#173
post #161

Earlier quoted context omitted.

NUMA style architecture has been existed for a long while now. It doesn't seem to take over the world.

But the practical case for it should grow as long transistor counts increase while the speed of light doesn't.

We already have practical use cases: training and evaluation of large neural networks.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#174

Earlier quoted context omitted.

The Von Neumann architecture is dead, IMHO future computing architectures involve many cores, all with local memory (not just a bit of cache), Tensor computing capabilities and very high bandwidth connecting these cores. Intel has Xeon Phi, but what else are they doing? There is so much opportunity in new computing architectures but it seems like Intel has been taken by surprise. I hope this giant wakes up.

Well, the core with its own memory is still a Von Neumann machine, is it not?

Yes, true, Von Neumann is dead, long live Von Neuman! ;)

The difference is of course that we should not see the whole cluster of cores as a Von Neumann machine, the memory bandwidth is just too low to drive multiple cores with some external memory, memory must be as close as possible to the cores themselves. Quote from wtallis lower in this sub-thread :

> You can't pretend that memory is all equidistant from the processor cores unless you want everything running equally slow.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#175

Earlier quoted context omitted.

We only got Intel 64 bit CPUs once AMD got them first and people starting to buy them.

> We only got Intel 64 bit CPUs once AMD got them first and people starting to buy them. Intel came first with Itanium (June 2001: https://en.wikipedia.org/w/index.php?title=Itanium&oldid=775... ), which clearly is a 64 bit CPU. The first x86-64 CPU by AMD got released in April 2003 ( https://en.wikipedia.org/w/index.php?title=X86-64&oldid=7754... ) and Intel's first x86-64 CPU came out June 2004 ( https://en.wikiped…

Alpha, SPARC and MIPS had 64-bit offerings before that. I was reading e-mail on a 64-bit machine when Itanium was called Merced.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#176
post #134

Earlier quoted context omitted.

We call that MIPS or Alpha, and it lost to x86 compatibility. Whose only competitor is ARM, which is little better in terms of decoding complexity.

> Whose only competitor is ARM, which is little better in terms of decoding complexity. T32 indeed has this problem, but not A32. With ARMv8 ARM released the A64 instruction set, which is designed new from ground up and is to my knowledge also not hard to decode. Nevertheless decoding complexity is not that relevant anymore. What is much harder and involves more die area is (super-)pipelining the execution, out-of-or…

Caches are transistor-dense, it's hard to optimize them further. Maybe something like Transmeta's architecture, a hybrid software/hardware approach would yield some improvement.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#177

Earlier quoted context omitted.

> We only got Intel 64 bit CPUs once AMD got them first and people starting to buy them. Intel came first with Itanium (June 2001: https://en.wikipedia.org/w/index.php?title=Itanium&oldid=775... ), which clearly is a 64 bit CPU. The first x86-64 CPU by AMD got released in April 2003 ( https://en.wikipedia.org/w/index.php?title=X86-64&oldid=7754... ) and Intel's first x86-64 CPU came out June 2004 ( https://en.wikiped…

Alpha, SPARC and MIPS had 64-bit offerings before that. I was reading e-mail on a 64-bit machine when Itanium was called Merced.

My parent was talking about Intel 64 bit CPUs.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#178

Earlier quoted context omitted.

Alpha, SPARC and MIPS had 64-bit offerings before that. I was reading e-mail on a 64-bit machine when Itanium was called Merced.

My parent was talking about Intel 64 bit CPUs .

Sorry. I was comparing both sides as an analogy why FPGA's won't be available on mass-market CPUs anytime soon.

The reason Itanium never achieved the mass acceptance Intel expected is because, even with Windows running on it, it never ran x86 software at a reasonable price/performance point. Java was Sun's attempt to make SPARC viable by breaking with the ISA compatibility problem.

Today, with Linux, JVM, .NET Core and interpreted languages running a lot of the server workloads we have, it'd probably be a very different story.

When compared with the other 64-bit architectures we had (I forgot IBM's z/Architecture) amd64 is still an awful register starved overcomplicated architecture.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#179
Don't try to make too much of this. I had been working with Intel since December on the issues of IDF. The vendor was not performing. They had no website up and emails and calls were not returned. Also, when I finally did reach the vendor, I asked them how they were going to handle the visa logistics of China/Asia IDF attendees coming to the US. I asked them if 2-3 months would be enough to get Visas approve with the Trump Administration. A few days here we are with the cancellation. This mess is purely Intel's fault. I even emailed Krazanich about putting more eyes on this. But's let's move. I'm heading to Ignite now....

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#180

Earlier quoted context omitted.

My parent was talking about Intel 64 bit CPUs .

Sorry. I was comparing both sides as an analogy why FPGA's won't be available on mass-market CPUs anytime soon. The reason Itanium never achieved the mass acceptance Intel expected is because, even with Windows running on it, it never ran x86 software at a reasonable price/performance point. Java was Sun's attempt to make SPARC viable by breaking with the ISA compatibility problem. Today, with Linux, JVM, .NET Core a…

> The reason Itanium never achieved the mass acceptance Intel expected is because, even with Windows running on it, it never ran x86 software at a reasonable price/performance point.

That was one (and surely important) reason. There were lots of others reasons

> http://courses.cs.washington.edu/courses/csep590/06au/projec...

(seriously: everybody interested in the history of Itanium should read this text), for example:

"Davidson also pointed out two areas where academic research could create a blind spot for architecture developers. First, most contemporary academic research ignored CISC architectures, in part due to the appeal of RISC as an architecture that could be taught in a semester-long course. Since graduate students feed the research pipeline, their initial areas of learning frequently define the future research agenda, which remained focused on RISC. Second, VLIW research tended to be driven by instruction traces generated from scientific or numerical applications. These traces are different in two key ways from the average systemwide non-scientific trace: the numerical traces often have more consistent sequential memory access patterns, and the numerical traces often reflect a greater degree of instruction-level parallelism (ILP). Assuming these traces were typical could lead architecture designers to optimize for cases found more rarely in commercial computing workloads. Fred Weber echoed this latter point in a phone interview. Bhandarkar also speculated that the decision to pursue VLIW was driven by the prejudices of a few researchers, rather than by sound technical analysis."

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