Earlier quoted context omitted.
Because they are not there yet...
When an ARM chip reaches the performance of a Xeon, it'll draw about as much power as a Xeon. There is no magic - computation has a minimum energy cost. What can happen is to make chips simpler in that less computation is spent in instruction decoding, tracking, scheduling and more is spent on actual execution.
For machine learning applications, I don't think the end game is to have complex CPUs, though.
Assuming that brains have managed to find more than a local optimum and that our understanding of them is somewhat accurate, ditching all those caches, translation buffers, etc. most of the bus bandwidth, and moving computation towards memory is the way to (eventually; we need to learn a lot before that's feasible) go for machine learning applications.
Does the brain even have instruction decoders?