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Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

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Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#71

From what I gather online, intel is entering into an exestential crisis as homegrown chips and GPUs are replacing CPUs in the battle for tomorrow's data center. All of the interesting research from Google and others all have one thing in common: a custom asic processor.

custom asic processor Is that like La Brea Tarpit ? Just say ASIC. An ASIC is an Application Specific Integrated Circuit . In particular, a GPU is not an ASIC. Saying Custom Application Specific Integrated Circuit Processor is doubly redundant. https://en.wikipedia.org/wiki/Application-specific_integrate... https://en.wikipedia.org/wiki/Graphics_processing_unit

A GPU actually also is an ASIC, it just happens to be that that application is a different one.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#72
post #2

I'm wondering why Intel is withdrawing so much of their money from different projects like this and OpenStack. Maybe AMD is putting a lot of financial pressure on them, and they have to put more funds in R&D?

No. Intel's R&D budget is larger than AMD's company-wide budget. If anything, Intel is moving to save face, and not because of finances.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#73

From what I gather online, intel is entering into an exestential crisis as homegrown chips and GPUs are replacing CPUs in the battle for tomorrow's data center. All of the interesting research from Google and others all have one thing in common: a custom asic processor.

The ASIC processors Google use are for inference , not training. Having efficient inference is great, but training is what uses up most of the compute power. The battle between GPUs and CPUs in the datacenter is real, but I wouldn't count out regular CPUs yet. Even with GPU-ready frameworks like Tensorflow, Theano, and Pytorch, it still requires a fair amount of domain expertise to get good performance out of GPUs. T…

There's nothing about the TPU architecture that prevents use for training. Training is also done as tensor operations, and training can be done at limited precision[1]. Just because the first TPU was memory-limited doesn't mean TPUs can never be used for training.

[1] https://arxiv.org/abs/1606.06160

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#74
post #34

Earlier quoted context omitted.

The ASIC processors Google use are for inference , not training. Having efficient inference is great, but training is what uses up most of the compute power. The battle between GPUs and CPUs in the datacenter is real, but I wouldn't count out regular CPUs yet. Even with GPU-ready frameworks like Tensorflow, Theano, and Pytorch, it still requires a fair amount of domain expertise to get good performance out of GPUs. T…

Correction: the ASIC processors that Google used in 2015 and just talked about, two years later, were for inference. We don't know what they use now and how. The paper hints that training might happen in a later revision. You have to wonder why they started with inference and not the other way round. Perhaps it's the case that you train a model once, then use it for predictions many, many, many times, thus using more…

> You have to wonder why they started with inference and not the other way round.

At least from what I know of ASICs (which is admittedly pretty high-level), this direction is the natural way I'd expect it to go, because the inference problem is much closer in scale to the kind of problem ASICs are already widely used for and good at. Fast inference can be done with a chip of a size similar to what you see in existing ASICs, like specialized DSP chips. Speeding up training is a lot more speculative. You could try scaling up to massively powerful individual chips that can each replace an NVidia GPU (but with lower cost / lower power budget), or improve distributed training so you can effectively use a much larger number of much weaker customized chips. And there are more significant memory and memory-bandwidth issues with training, so it's less of the pure-compute type of problem that ASICs are more often clear wins for. All of which is probably possible with enough effort, but less straightforward, especially to end up with something that beats GPUs on relevant metrics.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#75
post #55
post #42

Earlier quoted context omitted.

Atoms are too big, photons are too big, electrons are too big, and the speed of light is too slow. There's no longer plenty of room at the bottom. Still, it's not like the physical size of semiconductors is the problem. A CPU today is maybe 100mm^2 of silicon. 4U of rack space can easily hold tens of thousands of CPUs, if you can power them, cool them, and connect them up in a useful way.

if you can power them, cool them, and connect them up in a useful way. Good luck with that. Power costs go up linearly at best with cores if you don't have any more transistor scaling.

Power will always scale linearly with cores, of course, but you could make cores less power-hungry with reversible computing: https://en.wikipedia.org/wiki/Reversible_computing

Actually useful reversible logic is, as they say, an open problem.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#76
post #55

Earlier quoted context omitted.

if you can power them, cool them, and connect them up in a useful way. Good luck with that. Power costs go up linearly at best with cores if you don't have any more transistor scaling.

Power will always scale linearly with cores, of course, but you could make cores less power-hungry with reversible computing: https://en.wikipedia.org/wiki/Reversible_computing Actually useful reversible logic is, as they say, an open problem.

My point was that a new transistor shrink would give you lower power vs. the same transistor in previously larger node. You get more compute-per-watt with small transistors. If scaling stops, then all kinds of things get more difficult.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#77
This for me is a clear sign of mobile (and their processors) steady growth (and probably dominance) to (some) decline of Intel.

Android as an OS surpassing this March everything else on web-usage speaks the same story in different words (http://www.wired.co.uk/article/android-overtakes-windows).

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#78
post #22
post #15

Earlier quoted context omitted.

You forgot that Intel bought Nervana Systems last year, right before IDF. They develop custom ASIC processors for machine learning.

Which doesn't necessarily mean anything for Intel's future in machine learning. Intel bought an ARM chip maker before, too, and because of internal conflict of interest with the x86 group, it ended-up killing the ARM division. Will the same happen to other non-x86 groups? Who knows. But we also see that even Intel's previous "accelerator" divisions have moved focus to being "CPU-driven" as well (Xeon Phi), so we have…

> Intel bought an ARM chip maker before, too, and because of internal conflict of interest with the x86 group, it ended-up killing the ARM division.

reminds Sun in 1998 and the onward years when SPARC was like North Korea border patrol in preventing any x86 penetration into Sun even though it was clear that x86 was the future.

Re: Intel Discontinues the Intel Developer Forum; IDF17 Cancelled

#80

Anybody know if and when desktop CPU's might start getting FPGAs? Been waiting for that for a while now...

http://www.eweek.com/servers/intel-begins-shipping-xeon-chip... For the desktop, though? Not for a while.

Yeah, I was aware of this, I did mean for a desktop. But if I want to get this, would it come with all the software tools and whatnot? I have no idea what tools it would need or whether they need more money to compile code etc...
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