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Intel unveils Knights Corner 50 core server chip

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Re: Intel unveils Knights Corner 50 core server chip

#11

I wonder how many servers are currently CPU-bound? I've always been I/O bound (interchange that with memory-bound, depending on how much you would like to spend on memory).

Considering there is 8 meg of cache for all the cores, this must be for CPU-bound tasks only

The article says that it has 8mb of cache per core, shared by four hardware threads.

Re: Intel unveils Knights Corner 50 core server chip

#14

I wonder how many servers are currently CPU-bound? I've always been I/O bound (interchange that with memory-bound, depending on how much you would like to spend on memory).

Even if servers are I/O bound, this setup is almost like crunching 50 machines into one; applications will have lower latency access to data stored on larger memory.

Re: Intel unveils Knights Corner 50 core server chip

#15
post #11

Earlier quoted context omitted.

Considering there is 8 meg of cache for all the cores, this must be for CPU-bound tasks only

The article says that it has 8mb of cache per core, shared by four hardware threads.

That's 400MB of cache on the die, which seems highly unlikely.

Re: Intel unveils Knights Corner 50 core server chip

#16
New technologies often get started in a niche. Because server rooms already have multiple computers, and standard infrastructure for handling them, it is a natural fit for many-core chips (though bandwidth to RAM/disk may be a problem).

Once established in this market, the feedback loop with users who pay money will drive the technology to improve to suit that niche. The bugs will get ironed out, deficiencies worked around, specific infrastructure developed. Chips will use less power, and will get faster and cheaper.

Eventually, other uses will be found for the product - perhaps on the desktop, perhaps as mobile devices, perhaps in applications that were never imagined before, because they were not conceivable. The key benefit might be from a feature that is not considered very central to the technology, from an engineering perspective, but happens to be unique with respect to the alternatives.

Perhaps it could be compact size, low power consumption, doing many distinct tasks, greater reliability through redundancy.

Re: Intel unveils Knights Corner 50 core server chip

#17
post #11

Earlier quoted context omitted.

Considering there is 8 meg of cache for all the cores, this must be for CPU-bound tasks only

The article says that it has 8mb of cache per core, shared by four hardware threads.

The article is mistaken; the 8 MB is shared between the 50 cores. There's some speculation that it might be a Non-Uniform Cache Access architecture, where local parts of the shared cache are faster to read/write than other parts. If so, that would certainly be an impressive step. A better article is here:

http://www.channelregister.co.uk/2010/06/01/intel_knights_co...

Re: Intel unveils Knights Corner 50 core server chip

#18
post #11

Earlier quoted context omitted.

The article says that it has 8mb of cache per core, shared by four hardware threads.

That's 400MB of cache on the die, which seems highly unlikely.

That would be far more remarkable than putting 50 cores on the die. It would be cause for riotous celebration.

Re: Intel unveils Knights Corner 50 core server chip

#19

Each core in Knights Corner runs at 1.2GHz, is supported by 512-bit vector processing units, has 8MB of cache, and four threads per core. That's 200 simultaneous threads. Wow. That's almost like a GPU.

That's because it is a GPU. It's Larrabee. Intel couldn't get enough graphics performance out of it to compete with GeForce and Radeon in the graphics card market. However, they can still compete in the GPGPU market, where the specialized graphics hardware that GeForce and Radeon have is less of an advantage, and Larrabee's x86 compatibility is actually useful. Intel is afraid that GPGPU is going to encroach on their CPU turf, and this is their answer.
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