Could asynchronous designs improve performance of future CPUs if and when Moore's Law hits physical limits?
What happened to clockless computer chips?
11–20 of 49 posts
Re: What happened to clockless computer chips?
#12Anyone here working on async chips these days?
I've done some work with Octasic's Opus DSP system [http://www.octasic.com/technology/opus-dsp-architecture]
The cores themselves are asynchronous, with all of the benefits of lower power. The memories sitting outside of the cores are clocked, however.
I remember being a little bit disturbed by the temperature dependence of the chip on wall-clock execution time but it didn't affect our applications.
It was interesting to find this stuff as a product-ready platform.
Re: What happened to clockless computer chips?
#13Just a dumb question. Will it affect the instruction set of the CPU. Does the programming change fundamentally with async cpu's.
Modern x86 with its out of order execution is already pretty "async". Little changed for programmers, except those writing very low-level code, or compilers.
Re: What happened to clockless computer chips?
#14Earlier quoted context omitted.
I used to work at a startup ( https://www.linkedin.com/company/azuro ) that was commercialising the founders' work on asynchronous design. They eventually sold to Cadence. Asynchronous design is a huge sell; we scaled it back to just applying some async techniques to the clock tree of synchronous designs for moderate performance/power improvements. There are three problems we found: - the existing toolchain is synchr…
I'm starting to feel like a broken record but... A perfect opportunity with risc-v.
Folks are already working on a clockless RISC-V CPU:
Re: What happened to clockless computer chips?
#15Earlier quoted context omitted.
I used to work at a startup ( https://www.linkedin.com/company/azuro ) that was commercialising the founders' work on asynchronous design. They eventually sold to Cadence. Asynchronous design is a huge sell; we scaled it back to just applying some async techniques to the clock tree of synchronous designs for moderate performance/power improvements. There are three problems we found: - the existing toolchain is synchr…
I'm starting to feel like a broken record but... A perfect opportunity with risc-v.
Folks are already working on a clockless RISC-V CPU:
Re: What happened to clockless computer chips?
#16Earlier quoted context omitted.
I used to work at a startup ( https://www.linkedin.com/company/azuro ) that was commercialising the founders' work on asynchronous design. They eventually sold to Cadence. Asynchronous design is a huge sell; we scaled it back to just applying some async techniques to the clock tree of synchronous designs for moderate performance/power improvements. There are three problems we found: - the existing toolchain is synchr…
I'm starting to feel like a broken record but... A perfect opportunity with risc-v.
Folks are already working on a clockless RISC-V CPU:
Re: What happened to clockless computer chips?
#17Earlier quoted context omitted.
I used to work at a startup ( https://www.linkedin.com/company/azuro ) that was commercialising the founders' work on asynchronous design. They eventually sold to Cadence. Asynchronous design is a huge sell; we scaled it back to just applying some async techniques to the clock tree of synchronous designs for moderate performance/power improvements. There are three problems we found: - the existing toolchain is synchr…
I'm starting to feel like a broken record but... A perfect opportunity with risc-v.
Why do you say that?
I can't see anything about RISC-V (or any ISA!) that makes a difference to those four points.
Re: What happened to clockless computer chips?
#18Earlier quoted context omitted.
I used to work at a startup ( https://www.linkedin.com/company/azuro ) that was commercialising the founders' work on asynchronous design. They eventually sold to Cadence. Asynchronous design is a huge sell; we scaled it back to just applying some async techniques to the clock tree of synchronous designs for moderate performance/power improvements. There are three problems we found: - the existing toolchain is synchr…
ARM tried it in the 90s with the AMULET. https://en.wikipedia.org/wiki/AMULET_microprocessor
I knew someone who was (tangentially) involved with that; apparently one of the biggest problems was that it came out during the height of the Megahertz Wars, and pretty much the first thing anyone asked about the AMULET was how fast it was, expecting a clock speed as the answer.
Given that the answer to that question for the AMULET was 'Errm...', they'd then just abandon it as a processor candidate as being conceptually too difficult to think about.
I wonder if the design could be reworked into Verilog or VHDL and used as an FPGA soft core?
Re: What happened to clockless computer chips?
#19Could asynchronous designs improve performance of future CPUs if and when Moore's Law hits physical limits?
They can certainly improve performance, in that eg. a NOP instruction will "lock" the processor for much shorter than eg. a JZ; the main concern at this time is that we lack the research, expertise and instruments to deal with asynchronous CPUs.
Re: What happened to clockless computer chips?
#20Just a dumb question. Will it affect the instruction set of the CPU. Does the programming change fundamentally with async cpu's.
No. One of the projects that was doing the rounds when I heard about this stuff was Amulet: an async ARM core. Same instruction set.