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Liberouter Combo Cards – FPGA boards focused on network data processing

liberouter.org

1–10 of 36 posts

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#4

I can't open the site on my Android phone due to an SSL error. Is it just me, or there is a problem with the certificate?

I'm getting a database error. Here's the Google Cache: https://webcache.googleusercontent.com/search?q=cache:UrEvnt...

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#6
I saw the page via wayback machine since the site was down at the time. Seems like a cool academic project. I've been getting into FPGAs personally, with this exact application in mind.

I've been really stymied by how to process packets in hardware. The obvious approach seems to be to run an RTOS or even full-fledged linux if your FPGA has hard IP cores on it. But is there a better way? How much performance would one lose? I'm also a bit confused about how to communicate on PCI-Express (I'm a software guy ... so learning about DMA). I have seen soft IP for TCP/IP stacks but it seems too crazy. I'm doing this as a hobby education project btw. It has been great fun so far! Wish there were meetups on this topic.

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#7

Looks like we hugged them to death. Here's the Wayback Machine's most recently cached copy of the page: http://web.archive.org/web/20160604121207/https://www.libero...

Having recently tried to read a lot of old-ish research (10 years maybe, that's old for malware research), I really appreciate the value of the Wayback machine / Archive.org team. Donated €15 at some point just to feel a little better and will decide on another donation later. Was about to post the same link!

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#8

I saw the page via wayback machine since the site was down at the time. Seems like a cool academic project. I've been getting into FPGAs personally, with this exact application in mind. I've been really stymied by how to process packets in hardware. The obvious approach seems to be to run an RTOS or even full-fledged linux if your FPGA has hard IP cores on it. But is there a better way? How much performance would one…

Look up a paper called "packetshader." IIRC it was the first research to demonstrate packet processing via GPU.

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#9

I saw the page via wayback machine since the site was down at the time. Seems like a cool academic project. I've been getting into FPGAs personally, with this exact application in mind. I've been really stymied by how to process packets in hardware. The obvious approach seems to be to run an RTOS or even full-fledged linux if your FPGA has hard IP cores on it. But is there a better way? How much performance would one…

Generally speaking, FPGAs are for building hardware pipelines with fixed throughput and finite state machines to control things. If your first thought is "Linux", you're almost certainly better off with an off the shelf SoC. If you have a well understood problem (say, filtering packets based on a handful of patterns), you would design a filtering pipeline that would connect between two Ethernet MACs, applying the filtering at full line rate in between. Actually doing tcp/ip involves tracking a bunch of state and allocating very finite resources, but might not be necessary depending on your goal.

Re: Liberouter Combo Cards – FPGA boards focused on network data processing

#10
There was an article at Ars [1] that explained how Microsoft uses FPGA powered network cards at Azure.

The idea is to move "network decision making" (load balancing; maybe firewalls and other assorted stuff) from the CPU to the FPGA, where this kind of thing can be done faster, and more reliably (e.g. you can have hard timing constraints on a FPGA).

Guess the other players in this field are pure software switches, which can be very flexible, but sometimes slow. And ASICs, which are very fast (potentially faster than FPGAs) but not as flexible.

[1] - http://arstechnica.co.uk/information-technology/2016/09/micr...

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