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Apollo 11 Guidance Computer source code

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Re: Apollo 11 Guidance Computer source code

#111
post #21

Watch the landing: https://www.youtube.com/watch?v=k_OD2V6fMLQ During the landing, you'll here mention of 1201 and 1202 alarms. Here's what that's about: http://www.hq.nasa.gov/office/pao/History/alsj/a11/a11.1201-... Here's 1201 being called: https://github.com/chrislgarry/Apollo-11/blob/dc4ea6735c4646... And 1202: https://github.com/chrislgarry/Apollo-11/blob/dc4ea6735c4646...

This one is better image quality https://www.youtube.com/watch?v=Jg80HZsv_js

...and here's one with Neil Armstrong talking us through it...

https://www.youtube.com/watch?v=jfj2jqpst_Q&feature=youtu.be...

Re: Apollo 11 Guidance Computer source code

#112

Earlier quoted context omitted.

> Why did they have to do this instead of just leaving the CPU idle ? This would require a CPU that was designed to idle.

wow , wow ! Looks like I don't understand the first thing about the CPU design . Do CPUs have to be designed to IDLE ? Can you throw some more light on this ?

Normally the CPU clock runs continuously and every cycle the program counter increments (or gets changed by a branch instruction of some kind.) If you want to stop the CPU, you have to gate the clock somehow. Maybe a timer that you could configure and enable via software. But that's extra complexity.. and if you use dynamic logic (which is smaller and faster than static logic), you lose state when you halt. Spinning in a tight loop, on the other hand, doesn't require any hardware support.

Re: Apollo 11 Guidance Computer source code

#113

Earlier quoted context omitted.

> Why did they have to do this instead of just leaving the CPU idle ? This would require a CPU that was designed to idle.

wow , wow ! Looks like I don't understand the first thing about the CPU design . Do CPUs have to be designed to IDLE ? Can you throw some more light on this ?

A basic model of a CPU is running an infinite loop like this:

  1. If interrupts not masked, check for interrupt
  2. Load instruction
  3. Advance instruction pointer
  4. Execute instruction
It doesn't ever stop - as soon as the current instruction is finished executing it moves on to the next one. So, if you don't have anything better for the CPU to do, you need to have it spin in a loop of instructions anyway.

More modern CPU designs typically include an instruction that means "halt until next interrupt" which actually stops the CPU from fetching and executing instructions.

Re: Apollo 11 Guidance Computer source code

#114

people could've really used a higher-level language compiling to optimized AGC(apollo computer) assembly. Is there any reason why they didn't develop one? It seems it would've helped tremendously with the productivity and verification (and a lot of the explanations and equations would be readable as code, not as an non-executed comment)

The guidance and navigation functions were actually programmed in a slightly higher level language called "Interpretive".

Re: Apollo 11 Guidance Computer source code

#115

This is amazing and contains so many gems. I think this one is my favorite module: https://github.com/chrislgarry/Apollo-11/blob/master/THE_LUN... CAF CODE500 # ASTRONAUT: PLEASE CRANK THE TC BANKCALL # SILLY THING AROUND CADR GOPERF1 TCF GOTOP00H # TERMINATE TCF P63SPOT3 # PROCEED SEE IF HE'S LYING TC BANKCALL # ENTER INITIALIZE LANDING RADAR CADR SETPOS1 TC POSTJUMP # OFF TO SEE THE WIZARD ... CADR BURNBABY

https://github.com/chrislgarry/Apollo-11/blob/master/THE_LUN... - Link to referenced code.

Re: Apollo 11 Guidance Computer source code

#116
post #113

Earlier quoted context omitted.

wow , wow ! Looks like I don't understand the first thing about the CPU design . Do CPUs have to be designed to IDLE ? Can you throw some more light on this ?

A basic model of a CPU is running an infinite loop like this: 1. If interrupts not masked, check for interrupt 2. Load instruction 3. Advance instruction pointer 4. Execute instruction It doesn't ever stop - as soon as the current instruction is finished executing it moves on to the next one. So, if you don't have anything better for the CPU to do, you need to have it spin in a loop of instructions anyway. More moder…

wow.. Thanks for the explanation there.When we switched to modern CPUs that could actually Halt, was there actually hardware/physical changes to the CPU ? Or was it just a software change (ie) Added a new instruction to the existing instruction set ? ..

Is that what made it difficult for us to design processors capable of "idling" ? (ie) completely new hardware design

Re: Apollo 11 Guidance Computer source code

#118
post #113

Earlier quoted context omitted.

A basic model of a CPU is running an infinite loop like this: 1. If interrupts not masked, check for interrupt 2. Load instruction 3. Advance instruction pointer 4. Execute instruction It doesn't ever stop - as soon as the current instruction is finished executing it moves on to the next one. So, if you don't have anything better for the CPU to do, you need to have it spin in a loop of instructions anyway. More moder…

wow.. Thanks for the explanation there.When we switched to modern CPUs that could actually Halt, was there actually hardware/physical changes to the CPU ? Or was it just a software change (ie) Added a new instruction to the existing instruction set ? .. Is that what made it difficult for us to design processors capable of "idling" ? (ie) completely new hardware design

It was a hardware change. In those older CPU designs, the external clock signal was directly driving a state machine, so for as long as the clock was applied, the state machine would go.

It's important to realise that there was no good reason to have the ability to stop the CPU in those days - power consumption by the CPU itself was truly trivial compared to the memory and peripherals it was attached to, and those CPUs weren't really damaged or worn out by running continuously. Having the CPU spin in software when there was nothing else to do was perfectly fine.

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