A 32nm 1000-Processor Array
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A 32nm 1000-Processor Array
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Re: A 32nm 1000-Processor Array
#2Re: A 32nm 1000-Processor Array
#3https://en.wikipedia.org/wiki/Ambric
http://www.embeddedinsights.com/epd/Diagrams/nethra-am2045.j...
Re: A 32nm 1000-Processor Array
#4Cache coherency seems really hard to give up on, and even CPU-GPU cache coherency is becoming the expected norm, with even ARM delivering it.
Re: A 32nm 1000-Processor Array
#5So how do you program such a beast? What progress is being made on that front? Cache coherency seems really hard to give up on, and even CPU-GPU cache coherency is becoming the expected norm, with even ARM delivering it.
In the mid 1980s there was a CPU called a "Transputer" [1] made some of the people who moved to ARM. These CPUs could be connected together in huge networks and directly talk to each other.
The network of CPU's could auto-discover its topology, but coding for so many CPU's was difficult. Some specific algorithms scaled well with the number of CPUs, but most did not.
Re: A 32nm 1000-Processor Array
#6So how do you program such a beast? What progress is being made on that front? Cache coherency seems really hard to give up on, and even CPU-GPU cache coherency is becoming the expected norm, with even ARM delivering it.
Looked great though: http://www.corestore.org/cm2a.htm
Re: A 32nm 1000-Processor Array
#7Re: A 32nm 1000-Processor Array
#8Does anyone have a link or the name of another weird architecture that was posted a while ago? (~3 months maybe?) I remember that there were a large number of cores that all communicated with each other in some weird way and that they like didn't have main system memory or something like that...
Re: A 32nm 1000-Processor Array
#9This reminds me of the Ambric am2045 with 336 cores from 2007. They put 40 of these into an X-Ray machine for a total of 13,000 cores. https://en.wikipedia.org/wiki/Ambric http://www.embeddedinsights.com/epd/Diagrams/nethra-am2045.j...
https://en.wikipedia.org/wiki/ICL_Distributed_Array_Processo...
Re: A 32nm 1000-Processor Array
#10So how do you program such a beast? What progress is being made on that front? Cache coherency seems really hard to give up on, and even CPU-GPU cache coherency is becoming the expected norm, with even ARM delivering it.
This is "the" question. I suppose one could look at the Connection Machine: https://en.wikipedia.org/wiki/Connection_Machine The CM-2a had 4K or 8K processors and was reputedly very difficult to program. Looked great though: http://www.corestore.org/cm2a.htm