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Non-volatile Storage: CPUs no longer more performant than I/O devices

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Re: Non-volatile Storage: CPUs no longer more performant than I/O devices

#91
post #57

Earlier quoted context omitted.

This is pretty interesting. It's possible that people might confuse this bit... > The performance of SCMs means that systems must no longer "hide" them via caching and data reduction in order to achieve high throughput. ...in the original article with your mention of caching; by "cache coherency," I assume you're referring that your addon (card?) can introspect into the CPU cache? That's pretty awesome if that's what…

> I assume you're referring that your addon (card?) can introspect into the CPU cache? That's pretty awesome if that's what's happening. Y - see page 5, section 3.1.1 of http://www-304.ibm.com/webapp/set2/sas/f/capi/CAPI_POWER8.pd... for some info. Also - it doesn't have to be a card. ;-) It just is that today... > RAM Emulation This is hard. Telling a program (and the OS) that different pages are fundamentally diffe…

Wow, thanks for taking the time to respond! :)

And now I get it: RAM emulation is not 100% stable due to the fact that application architecture simply isn't optimized at all to handle the interfaces yet, as opposed to flaky hardware (my initial arguably logical assumption). The article could have made that a little plainer, thanks for clearing that up.

And thanks for dropping those performance figures; if there was an ELI5-sized soundbite explaining the rationale behind this card, that would be it.

( http://reddit.com/r/ExplainLikeImFive (ELI5) explains complex subjects using accessible, respectful simplifications. If I may say so, your explanation fits precisely into that category. :P)

It's sad there's nothing like this for x86, but I wouldn't be too surprised if it were deemed too difficult to support an I/O path as performant as this without uncomfortable architectural changes. On that note, POWER8 is still at the point where it has the chance to lock in a future-proof architectural design, and hopefully it takes full advantage of that.

My mention of ATX was simply a reference to "it doesn't need to be tiny or cool, it just needs to exist," but it appears the board you linked is currently the only product with any sort of vague open market presence. I definitely look forward to more accessible POWER architecture products in the future. :D

Finally, thanks heaps for the PTOpenLab link! I'm still figuring out their points system and how that translates to daily usage allowance, but this looks incredibly cool. It's places like this that are laying the groundwork :)

Re: Non-volatile Storage: CPUs no longer more performant than I/O devices

#92
post #43

Earlier quoted context omitted.

The syscall overhead isn't the problem, that's dirt cheap as you say. The problem is the context-switch overhead. Calling into the OS flushes a lot of data and instructions from the cache, and that lost performance after returning can easily add up to around 30µs.[1] [1] http://blog.tsunanet.net/2010/11/how-long-does-it-take-to-ma...

Sounds like multiple caches are an obvious solution. No code in the OS needs access to the user code or data cache, and vice versa. Smart cache management might be one of Intel's goals for the Altera buyout.

I think Altera had more to do with generic user modifiable compute. They have been working with FPGAs for a while now (http://www.enterprisetech.com/2014/06/18/intel-mates-fpga-fu...).

Re: Non-volatile Storage: CPUs no longer more performant than I/O devices

#93
post #2

For anyone else who was momentarily confused: on figure 2, the y-axis scale is incorrectly labeled "ns" when it should be "ms".

Anyone old enough will remember the time hard drivers were correctly marketed with access time in milliseconds as the main speed indicator. This ended around 1994() when pretty much all the drives reached ~10ms access time.

https://en.wikipedia.org/wiki/Hard_disk_drive_performance_ch...

I did a quick scan of old computer magazines (infoworld, pc mag etc).

Re: Non-volatile Storage: CPUs no longer more performant than I/O devices

#94
post #42

Earlier quoted context omitted.

This word is one of my pet peeves as well. "Performant" is an ignorant and foolish way to say "high performance". It's like saying "voltant" instead of "high voltage". I'm all for coining new words that mean new things, but when someone says "performant" I treat it as a clue that they might be a sloppy thinker.

No, it's more like the wealth of other adjectives that follow the pattern of "having/with -ance" -> "-ant". Important, significant, brilliant, vigilant, cognizant, dissonant, exuberant, invariant, radiant, elegant, abundant, ... I suppose you could say that someone using just about any of those words is trying to sound smart or overly formal, and so we should deny their status as words to bring the speakers down a no…

"conformant" seems like the strongest analogy.

Re: Non-volatile Storage: CPUs no longer more performant than I/O devices

#95
post #15

I've made that point before on YC.[1] We need to view fast storage as something other than a disk accessed through the OS, and other than slow RAM accessed as raw memory. Access through the OS is too slow, and access as raw memory is too risky. What's probably needed is something like a GPU sitting between the CPU and the fast persistent storage. Call this an SPU, or "storage processing unit." What would such a devic…

If you're going to have database-like features, might as well just make the entire machine a dedicated database server.

Having a database engine accessing the entire storage device (in a shared-memory like setup) is no more dangerous than having a database engine accessing all of its own memory and disk.

So we can have one server for SQL-like things, one more server for NoSQL like things, and one more server for storing blobs. And that's that.

Re: Non-volatile Storage: CPUs no longer more performant than I/O devices

#97

My sense is this is only true today because OS kernels are ridiculously slow relative to what the hardware can achieve. Most of my recent designs treat RAM as if it were (what we used to considered to be) disks, i.e. all computation and in-process data is in cache exclusively, and "going to RAM" requires the use of a B-tree-like structure to amortize the cost. For example, once you've opened a RAM page line on a norm…

Not that is some interesting thinking. You got a blog post elaborating on this?

Not sure exactly what OP is referring to, but CSS-trees [1] are a classic example of cache-aware indexing structures that fetch entire pages into cache and arrange data so that most of the comparisons happen on cached data. In most cases, they significantly outperform binary trees. Masstree [2] is a more recent example of this.

[1] http://www.vldb.org/conf/1999/P7.pdf

[2] https://pdos.csail.mit.edu/papers/masstree:eurosys12.pdf

Re: Non-volatile Storage: CPUs no longer more performant than I/O devices

#98
post #79

Earlier quoted context omitted.

Sounds like multiple caches are an obvious solution. No code in the OS needs access to the user code or data cache, and vice versa. Smart cache management might be one of Intel's goals for the Altera buyout.

It's already here[1], but I don't think it can be used for cache partitioning between the kernel and userspace (but I could be wrong!) [1] http://danluu.com/intel-cat/

(Disclosure: one of the authors here)

I don't think CAT can be used to partition kernel and userspace -- I'm not even sure how you'd go about doing that given that you can (and do) have shared pages between them.

That being said, from our experiments, if you're using userspace network and NVMe drivers the context switch and associated cache pollution is not a problem, since it is happening pretty infrequently (primarily just timer interrupts, and those can be turned off, but we haven't needed to).

Re: Non-volatile Storage: CPUs no longer more performant than I/O devices

#99

Performant: still not a word.

Seymour Cray never said "performant". Engineers say "fast" or "fast enough". Marketing types and nontechnical management seem to prefer this neologism. But it might also be a generational thing. A new coinage that I noticed in the past year that also grates on my ears: "learning" as a substitute for "lesson", as in "what were your learnings from the hackathon?" Anyone else caught this one?

(One of the authors here)

This is by far my favourite post in this entire thread -- I don't think I've ever seen Seymour Cray referenced as an authority in this manner before :)

Not specifically to OP, but for everyone unhappy about the use of performant: Pretty happy to concede that it isn't our finest bit of writing. Pretentiousness? Lack of technical nous? A bit of hurried/careless wording? I'll let you folks decide...

Re: Non-volatile Storage: CPUs no longer more performant than I/O devices

#100

This is so true, the world has changed greatly and not everyone has gotten the memo. I saw a really cool device made by Texas Memory systems which was a "ram disk" that was all ram with disk backing, and when you lost power it flushed to disk. I wanted something that worked better for a storage paradigm and designed/invented a network accessible memory appliance[1]. Basically using ethernet packets you could store 8K…

That is fascinating. Could this reliably reduce the hardware footprint on any device?
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