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nand2mario

HN member
Joined
Sat, Sep 13, 2025, 6:21 PM UTC
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277
Public activity
20 items

About nand2mario

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Recent public activity

  1. comment
    Comment #49222425

    Thanks for mentioning z386. Much of its recent progress was made possible by the reverse engineering and disassembly of the original 80386 microcode ( https://news.ycombinator.com/…

  2. comment
    Comment #48654179

    Probably some protected mode logic bugs. Just need more time to debug through the boot process.

  3. comment
    Comment #48654158

    The memory pipeline just starts one cycle later than now. Effective address is calculated during the first cycle of the instruction. The microcode then waits for it to finish with …

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    Comment #48255213

    I think there are two reasons we haven’t seen an FPGA FPU yet, especially for MiSTer. First, FPUs are complex and FPGA support for floating point is limited. There's DSP blocks for…

  6. comment
    Comment #48249041

    Doom (DOS extender games) is an easier protected mode application as it does not use complex page tables. Linux is much more complex.

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    Comment #48248508

    Not really. The 386 does not have an interface to read the ROM direclty. Instead, it uses the Built-In Self-Test (BIST) to verify the ROM's contents. It's basically a checksum-like…

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    Comment #47822099

    Yep. The microcode in real mode segment loading (as shown in the post) does not set the limit to 64KB. That is why returning to real mode with a large value like 4GB in limit gives…

  10. comment
    Comment #47821578

    Nice findings. For segment loads from memory, the entry point is actually shared between real and protected mode on the 386. The microcode branches later based on PE and does the e…

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    Comment #46744860

    I was just trying to give a bit of historical context, but apparrently need to be more precise next time! 386 is the beginning of 32 bit. But it's mainly the pentium and 486 that r…

  13. comment
    Comment #46744812

    Author here. Happy to discuss the technical details. The broader goal is to understand the 80386 microcode and hardware, and build an FPGA core around it, similar to what was alrea…

  14. comment
    Comment #46742385

    Right. Or it could be frequency illusion. Once you become aware of something, it appears to be more frequent: https://en.wikipedia.org/wiki/Frequency_illusion

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  17. comment
    Comment #46156199

    xtce_trace sounds fantastic — exactly what I need right now while debugging my Verilog 8086 core. Thank you also for the microcode disassembly. It’s been fun to work through.

  18. comment
    Comment #45237005

    It currently uses 44% of the LUTs and 59% of the BRAMs (out of 340 × 2 KB blocks). The chip itself is fairly large and inexpensive, though performance leans toward the lower side.

  19. comment
    Comment #45234399

    Yes, for exactly the reason. SDRAM is much easier to work with in retro computing than DDR.

  20. comment
    Comment #45234378

    Author here. You’re right—EDO or FPM would be correct for the era. But as others have noted, DDR3 is fundamentally different from early 1990s memory, and it simply won’t run at the…