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Hypura – A storage-tier-aware LLM inference scheduler for Apple Silicon

github.com

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Re: Hypura – A storage-tier-aware LLM inference scheduler for Apple Silicon

#5
It will be interesting to compare this to https://news.ycombinator.com/item?id=47476422 and https://news.ycombinator.com/item?id=47490070 . Very similar design except that this is apparently using mmap, which according to the earlier experiment incurs significant overhead.

Re: Hypura – A storage-tier-aware LLM inference scheduler for Apple Silicon

#7

Where does "1T parameter model" come from? I can only see models with 70B params or less mentioned in the repo.

Yeah title comes from nowhere in the link. No doubt it's possible but all that matters is speed and we learn nothing of that here...

Re: Hypura – A storage-tier-aware LLM inference scheduler for Apple Silicon

#10
This is a pretty cool project! Essentially this is like using Swap memory to extend your RAM, but in a 'smart' way so you don't overload the NVMe unnecessarily.

I do wonder in practice how the 'smarts' pan out, because putting a ton of stress on your NVMe during generation is probably not the best choice for it's longevity.

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