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Avremu: An 8-Bit AVR Microcontroller Simulator Written in LaTeX

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Re: Avremu: An 8-Bit AVR Microcontroller Simulator Written in LaTeX

#6
post #5

Had to read the title 3 times. It's... actually readable? For example https://gitlab.brokenpipe.de/stettberger/avremu/-/blob/maste... hits me as a very usual pattern to write emulators.

I made an AVR emulator in Haxe/JavaScript.

It turned out to be more awkward than I expected. Most 8-bit processors have instructions fairly clearly specified in the first byte. So the bulk of the decoding work can be done with a small jump table. The avr is more bit packed. Due to the way I progressively implemented the instructions I ended up with a kind-of tree of case statements. At some stage I'd like to go back and have a converter to a larger but easier to decode format. Instructions being in ROM(ish) and being easy to detect when updated means AOT is easy enough to do.

It might only need 32 bits per instruction. Opcode in the first byte and then byte aligned operands.

Re: Avremu: An 8-Bit AVR Microcontroller Simulator Written in LaTeX

#8

I had quite some fun implementing this at a very lovely lake in Sweden, while my colleagues were attending GPCE.

That's absolutely hilarious, and a pretty fun hack.

By the way, if I understood you correctly, this sentence

> I'm still missing 5 opcodes (MULS, MULSU, FMUL, FMULS, FMULSU), but until now I did not encounter a C file, the AVR-GCC emits these opcodes.

could be rewritten as

> There are 5 opcodes that are not implemented (MULS, MULSU, FMUL, FMULS, FMULSU), as I have not yet encountered a C file for which AVR-GCC emits these opcodes.

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