Tiny GPU: A minimal GPU implementation in Verilog
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Re: Tiny GPU: A minimal GPU implementation in Verilog
#2I know the terminology has gotten quite loose in recent years with Nvidia & Co. selling server-only variants of their graphics architectures as GPUs, but the "graphics" part of GPU designs make up a significant part of the complexity, to this day.
Re: Tiny GPU: A minimal GPU implementation in Verilog
#3Re: Tiny GPU: A minimal GPU implementation in Verilog
#4Yet another "GPU" providing no graphics functionality. IMO theses should be called something else.
Re: Tiny GPU: A minimal GPU implementation in Verilog
#5Re: Tiny GPU: A minimal GPU implementation in Verilog
#6Yet another "GPU" providing no graphics functionality. IMO theses should be called something else.
I think the establishing term is AIA, AI Accelerator.
What is it exactly that sets these units apart from CPUs? Something to do with the parallel nature of the hardware?
Re: Tiny GPU: A minimal GPU implementation in Verilog
#7Yet another "GPU" providing no graphics functionality. IMO theses should be called something else.
Re: Tiny GPU: A minimal GPU implementation in Verilog
#8Re: Tiny GPU: A minimal GPU implementation in Verilog
#9Yet another "GPU" providing no graphics functionality. IMO theses should be called something else.
More specifically [1] we could also call CPUs long / deep data dependency processors (LDDPs) and GPUs wide / flat data dependency processors (WDDPs).
[0]: https://en.wikipedia.org/wiki/Amdahl%27s_law [1]: https://en.wikipedia.org/wiki/Data_dependency