Notch's Specification for the In-Game DCPU-16
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Re: Notch's Specification for the In-Game DCPU-16
#2Just waiting for the first post about programming this CPU to pop up on Stack Overflow ... :)
It's quite an interesting architecture. From an initial perusal, I found these features note-worthy:
* Explicit access to PC as a register, makes "computed goto" trivial and very natural.
* Because of the above, there is no JMP instruction.
* Treating operations on registers as "values" makes the instruction set very orthogonal.
* No instructions for bit-manipulation.
* Lots of possible NOP instructions, like "SET PC,PC" (which I think should work, depends a bit on exactly when it's incremented but it looks safe).
* Word-addressed memory will make string processing interesting to implement. Maybe in space, everyone uses UTF-16.
* Single 64 K address space will put quite the limit on the amount of code, I guess the game will show how much code is needed to do anything.
* No I/O instructions means I/O must be memory-mapped, further reducing the space available for code. Maybe there will be bank-switching?
* No interrupts.
Re: Notch's Specification for the In-Game DCPU-16
#3Just waiting for the first post about programming this CPU to pop up on Stack Overflow ... :) It's quite an interesting architecture. From an initial perusal, I found these features note-worthy: * Explicit access to PC as a register, makes "computed goto" trivial and very natural. * Because of the above, there is no JMP instruction. * Treating operations on registers as "values" makes the instruction set very orthogo…
> * Word-addressed memory will make string processing interesting to implement. Maybe in space, everyone uses UTF-16.
Everyone in Minecraft, too -- almost. The string encoding in Minecraft's protocol spec is UCS-2, just a sneeze away from UTF-16. It seems Notch has a soft-spot for large encodings. It makes sense from a calculation and lookup perspective, but I wonder if the increased bandwidth and storage of 16-bit blocks has a measurable impact.
Re: Notch's Specification for the In-Game DCPU-16
#4Ok. Start coding now please.
Re: Notch's Specification for the In-Game DCPU-16
#5Just waiting for the first post about programming this CPU to pop up on Stack Overflow ... :) It's quite an interesting architecture. From an initial perusal, I found these features note-worthy: * Explicit access to PC as a register, makes "computed goto" trivial and very natural. * Because of the above, there is no JMP instruction. * Treating operations on registers as "values" makes the instruction set very orthogo…
With cleverness, I could see the memory constraints being not so terribly constraining, even without a (real) bank switching mechanism.
The reason we use "RAM" as we generally think of it is basically that other forms of storage are obscenely slow, right? In this case, however, our "mass storage" device would actually be... RAM. Just not directly-addressable RAM. Loading code and data from "disk" as-needed could be relatively fast.
Edit:
> No interrupts.
Good catch, that's probably something we'll see added. I don't think Notch will like emulating a thousand polling CPUs...
Edit 2:
Just spotted this in Notch's twitter feed: https://twitter.com/#!/notch/status/187454444571598848
"An emulator is coming Eventually(tm). I want to sort out some more IO design first, not release too early."
So, I/O is still up in the air.
Re: Notch's Specification for the In-Game DCPU-16
#6Context:
For those who are puzzled (as I was) as to what this CPU is for, I found this:
> Notch's next game, 0x10c, "will allow players to create their own spaceship in the far, far future of an alternate universe ... More exciting - especially for those versed in programming languages - is the ship's computer. It's a fully-functional 16-Bit CPU that controls the entire vessel..." http://www.dealspwn.com/notchs-space-trading-game-real-calle...
Also: http://www.theverge.com/2012/4/4/2924594/minecraft-creator-n...
Re: Notch's Specification for the In-Game DCPU-16
#7Just waiting for the first post about programming this CPU to pop up on Stack Overflow ... :) It's quite an interesting architecture. From an initial perusal, I found these features note-worthy: * Explicit access to PC as a register, makes "computed goto" trivial and very natural. * Because of the above, there is no JMP instruction. * Treating operations on registers as "values" makes the instruction set very orthogo…
I'm a self-taught programmer, and don't know much about CPUs. Would someone mind putting this into relatively plain english, I'm quite curious to know the practical implications of this. Can we expect to see Python running on it in the near future for example :) ?
Re: Notch's Specification for the In-Game DCPU-16
#8I guess we'll be able to write our own malware to take over other peoples' ships, then? Pretty awesome, just call me Locutus :)
Re: Notch's Specification for the In-Game DCPU-16
#9Just waiting for the first post about programming this CPU to pop up on Stack Overflow ... :) It's quite an interesting architecture. From an initial perusal, I found these features note-worthy: * Explicit access to PC as a register, makes "computed goto" trivial and very natural. * Because of the above, there is no JMP instruction. * Treating operations on registers as "values" makes the instruction set very orthogo…
I'm a self-taught programmer, and don't know much about CPUs. Would someone mind putting this into relatively plain english, I'm quite curious to know the practical implications of this. Can we expect to see Python running on it in the near future for example :) ?
Although some of the implications require experience to understand, I'd say it already is in "relatively plain English", you simply haven't been exposed to the vocabulary and concepts necessary. Trying to explain in any detail would basically be reproducing Wikipedia, so here are some links:
http://en.wikipedia.org/wiki/Program_counter
http://en.wikipedia.org/wiki/Word_(computer_architecture)
http://en.wikipedia.org/wiki/JMP_(x86_instruction)
http://en.wikipedia.org/wiki/NOP
http://en.wikipedia.org/wiki/Orthogonal#Computer_science
http://en.wikipedia.org/wiki/Address_space
http://en.wikipedia.org/wiki/Memory-mapped_I/O
http://en.wikipedia.org/wiki/Interrupt
And no, don't expect Python anytime soon. Expect a C compiler, FORTH, possibly some sort of Pascal, but a highly dynamic language is unlikely. The system is too resource-constrained to make it practical. A static language that looks kind of like Python isn't out of the question, but it won't do a lot of the things you expect from Python, Ruby, PHP, or Perl.
Re: Notch's Specification for the In-Game DCPU-16
#10Just waiting for the first post about programming this CPU to pop up on Stack Overflow ... :) It's quite an interesting architecture. From an initial perusal, I found these features note-worthy: * Explicit access to PC as a register, makes "computed goto" trivial and very natural. * Because of the above, there is no JMP instruction. * Treating operations on registers as "values" makes the instruction set very orthogo…
I'm a self-taught programmer, and don't know much about CPUs. Would someone mind putting this into relatively plain english, I'm quite curious to know the practical implications of this. Can we expect to see Python running on it in the near future for example :) ?
Good question. To run python on this CPU, someone (you?) needs to port Cpython to it. A CPU runs assembly language, and it's not hard for a hacker to port C to a new CPU, because C is small. In addition, implementing C is the sort of thing that hackers like to do. So you can count on C running on any given CPU, virtual or real.