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Intel CPU Die Topology

jprahman.substack.com

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Re: Intel CPU Die Topology

#5
post #4

Why is the rtt measured here on canon lake so asymmetric? I would have expected symmetry along the leading diagonal.

And why is core 0 magical on that machine?

IIRC, core 0 is the one that tends to service processor interrupts, which may mean that the data is unusually noisy in a way that tends to underestimate the RTT latency time.

Re: Intel CPU Die Topology

#6
post #5
post #4

Earlier quoted context omitted.

And why is core 0 magical on that machine?

IIRC, core 0 is the one that tends to service processor interrupts, which may mean that the data is unusually noisy in a way that tends to underestimate the RTT latency time.

There’s a similar weird artifact at index 64.

Re: Intel CPU Die Topology

#8
This might be a nitpick, but it seems like already the intro sentence isn't factually accurate:

> Over the past 10-15 years, per-core throughput slowed down

I assume that the author meant that the acceleration of per-core throughput over time has slowed down, not the throughput itself.

Re: Intel CPU Die Topology

#9
post #6
post #5

Earlier quoted context omitted.

IIRC, core 0 is the one that tends to service processor interrupts, which may mean that the data is unusually noisy in a way that tends to underestimate the RTT latency time.

There’s a similar weird artifact at index 64.

Core 64 is the hyper-threaded pair of core 0.
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