Intel Brings Chiplets to Data Center CPUs

Intel Brings Chiplets to Data Center CPUs
eetimes.com

The 4 die SoC does look an awful lot like 1st gen EPYC.

Intel's first proper competitor to Zen is coming out soon, and from what I've seen so far it looks like a monster. Couple this with them launching GPU's into the most demand-heavy market we might ever see, they don't have to do much to have a good few years.

Also, every measure I've ever seen has AMD still at least a doubling away from parity with Intel, so I find your figure very hard to believe.

But this story is about Intel. Though it depends on how you define "chiplet". In this article it looks like 4 identical chips wired on a package each with their own IO and memory controllers. That's very different from from AMD's core chips wired to an IO chip, and is nothing new for Intel. https://en.wikipedia.org/wiki/Multi-chip_module

It's the expected response from Intel when they are unable to compete on throughput per socket with a single chip (they went to DCMs during the period of Opteron dominance too). I don't know what the story is really -- they said the latency was too high to do this before but they've already done something effectively the same (and multi socket SMP systems have even higher chip to chip latency again, so clearly it can be done). I guess they just improved the on package interconnect performance a bit, but almost certainly they would have done a multi chip to compete with AMD even if they were not able to improve that latency.