Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
openpowerfoundation.org
Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
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Re: Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
#2This is a very important step. I don't understand how this is not on the first page. Maybe a more click-baity title is needed?
Re: Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
#3This is a very important step. I don't understand how this is not on the first page. Maybe a more click-baity title is needed?
Commenting on articles early in their life weights them down significantly, if you want something on the front page you should absolutely not comment on it until it gets there.
Re: Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
#4Congratulations.
Re: Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
#5This is a very important step. I don't understand how this is not on the first page. Maybe a more click-baity title is needed?
Who is this important for? Is there a lot of software still being developed for POWER? It seems niche to me, but maybe I'm the one in a niche.
Re: Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
#6This is a very important step. I don't understand how this is not on the first page. Maybe a more click-baity title is needed?
Commenting on articles early in their life weights them down significantly, if you want something on the front page you should absolutely not comment on it until it gets there.
Thanks for the advice. Didn't know that. Actually, I'm answering only because because it finally got to the first page.
Off topic: where did you get this rule?
Re: Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
#7What does this mean to noobs like me?
Re: Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
#8This is a very important step. I don't understand how this is not on the first page. Maybe a more click-baity title is needed?
Who is this important for? Is there a lot of software still being developed for POWER? It seems niche to me, but maybe I'm the one in a niche.
IMO: the underlying architecture is mostly relevant to kernel/compiler authors and people doing aggressive optimization. For most application devs it's about as irrelevant as you can get (unless your language has a very hard to port compiler cough rust.)
What's good about this is that the source is available and can be verified to some degree against the hardware (by decapping it.) That puts a log of constraints on what kinds of secret back doors people can build that we didn't have before.
Re: Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
#9A fully open source chip, from Verilog to Fabrication is cool!
It may be 180nm (1999-era technology), but that's still hugely important. The world of semiconductor design is incredibly closed source and secretive.
Re: Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW
#10This is a very important step. I don't understand how this is not on the first page. Maybe a more click-baity title is needed?
Who is this important for? Is there a lot of software still being developed for POWER? It seems niche to me, but maybe I'm the one in a niche.
The POWER/PowerPC ISA is still widely used in safety-critical avionics, where a mature tool-chain exists for supporting DO-178 objectives.
In my opinion, an area of interest going forward into the next decade of more safety-critical software written by smaller and smaller orgs (e.g. eVTOL companies, sensor companies, etc) is continuing to push forward which objectives can be accomplished by formal means instead of primarily through testing.
An NXP or IBM processor might be great, and might be mature, and might be very well tested -- but I, as a safety-critical software developer, have little way of demonstrating that to certification authorities. The availability of open-source processor designs and, in the future, traceable and accountable conversion from those HDL designs to RTL, to masks, and then to silicon, gives a path to showing that portions of a processor are correct-by-design, and thus a path to the goal of showing that my machine-code-as-authored(-by-an-assembler) and machine-code-as-executed(-by-a-processor) semantics match.