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SiFive Introduces 7 Series RISC-V Cores with E7, S7 and the U7 Series

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Re: SiFive Introduces 7 Series RISC-V Cores with E7, S7 and the U7 Series

#6
post #2

I am pretty excited about RISC-V. Hoping to see a v8 JavaScript and Node.js port in the future.

That shouldn't be super hard. I don't think there is much assembly in either. And C can be compiled to RISC-V already.

My only experience porting node was to a specialized ARM system a while ago, so ARM support may have been already built in or things may have changed.

edit: as people have commented, there indeed is a fair amount of arch specific stuff for reference the mips directory https://github.com/v8/v8/tree/master/src/mips64

Re: SiFive Introduces 7 Series RISC-V Cores with E7, S7 and the U7 Series

#7
post #2

I am pretty excited about RISC-V. Hoping to see a v8 JavaScript and Node.js port in the future.

That shouldn't be super hard. I don't think there is much assembly in either. And C can be compiled to RISC-V already. My only experience porting node was to a specialized ARM system a while ago, so ARM support may have been already built in or things may have changed. edit: as people have commented, there indeed is a fair amount of arch specific stuff for reference the mips directory https://github.com/v8/v8/tree/ma…

V8 has a JIT, which is always going to require work to port to a new architecture. But the new-ish TurboFan backend is supposed to have the architecture-dependent parts relatively well factored out[1], so it's not as hard as it might be.

https://docs.google.com/presentation/d/1_eLlVzcj94_G4r9j9d_L...

Re: SiFive Introduces 7 Series RISC-V Cores with E7, S7 and the U7 Series

#8
post #2

I am pretty excited about RISC-V. Hoping to see a v8 JavaScript and Node.js port in the future.

That shouldn't be super hard. I don't think there is much assembly in either. And C can be compiled to RISC-V already. My only experience porting node was to a specialized ARM system a while ago, so ARM support may have been already built in or things may have changed. edit: as people have commented, there indeed is a fair amount of arch specific stuff for reference the mips directory https://github.com/v8/v8/tree/ma…

v8 is a JIT compiler. It emits instructions for specific architectures. So even if it's not written in assembly, it has some very architecture specific parts in it.

Re: SiFive Introduces 7 Series RISC-V Cores with E7, S7 and the U7 Series

#9
post #4

When can I buy an affordable, complete RISC-V computer? I've been long planning to cook my own with FPGA but it seems like soon we'll start getting affordable RISC-V CPUs with other utility support?

Affordable RISC-V systems will only happen if they reach a comparable level of mass production as proprietary systems. What you will more likely see for now is a gradual increase in the number of components on GPUs, HDDs etc which use RISC-V instead of ARM or something else. The ISA is only a part of the cost equation.

Re: SiFive Introduces 7 Series RISC-V Cores with E7, S7 and the U7 Series

#10
I've only had a passing interest in learning assembly. It's always been in the "maybe one day" category.

But after learning about how small the RISC-V instruction set is (less than 50 apparently, but I can't find a citation for that anywhere), I'm far more motivated to get into it.

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