Why I will be using RISC-V in my next chip
adapteva.com
Why I will be using RISC-V in my next chip
1–10 of 100 posts
Re: Why I will be using RISC-V in my next chip
#2SIMD and VLIW are the future of microprocessors, and unfortunately it doesn't seem like this ISA will be able to support them.
Re: Why I will be using RISC-V in my next chip
#3That's awesome! RISC-V seems like a well defined ISA that allows for lots of extensions. Seems like a perfect fit for a board like the parallella.
Re: Why I will be using RISC-V in my next chip
#4Does anybody have a cached version of this? It keeps returning db errors.
Re: Why I will be using RISC-V in my next chip
#5Does anybody have a cached version of this? It keeps returning db errors.
Google Cache Link: https://webcache.googleusercontent.com/search?q=cache:http%3...
Re: Why I will be using RISC-V in my next chip
#6Site seems slow and might go down: mirror
http://i.imgur.com/0FmTYcH.png
(Fullpage screenshot as Google cache lacked styling)
Re: Why I will be using RISC-V in my next chip
#7SIMD and VLIW are the future of microprocessors, and unfortunately it doesn't seem like this ISA will be able to support them.
RISC-V has a vector mode that can be used for SIMD applications.
VLIW has been the future since the 80s, and we're still waiting for the magic wonder compilers that can actually spit out efficient VLIW code. Even GPUs have abandoned VLIW (AMD TeraScale) in favour of RISC (Nvidia, AMD GCN).
Re: Why I will be using RISC-V in my next chip
#8SIMD and VLIW are the future of microprocessors, and unfortunately it doesn't seem like this ISA will be able to support them.
RISC-V has a vector mode that can be used for SIMD applications. VLIW has been the future since the 80s, and we're still waiting for the magic wonder compilers that can actually spit out efficient VLIW code. Even GPUs have abandoned VLIW (AMD TeraScale) in favour of RISC (Nvidia, AMD GCN).
VLIW DSPs are in every phone. VLIW CPUs are almost certainly a bad idea and as to GPUs, AFAIK VLIW needs to coexist with barrel threading there which might create problems. But VLIW certainly has its place.
Re: Why I will be using RISC-V in my next chip
#9Site seems slow and might go down: mirror http://i.imgur.com/0FmTYcH.png (Fullpage screenshot as Google cache lacked styling)
Re: Why I will be using RISC-V in my next chip
#10Good that they're getting on the bandwagon as they're already popular with maker types. I also like the serendipity where this post led me to an equally exciting one:
http://www.adapteva.com/announcements/an-open-source-8gbps-l...
Love that they developed and open-sourced a 8Gbps, 1us, I/O interface. That might come in handy. :)