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The Visual ARM1

blog.visual6502.org

1–10 of 16 posts

Re: The Visual ARM1

#2
I hope they tear apart the VIC-II chip next time.

I know it seems like the state-machines of VIC-II are fully documented, but perhaps there could be even more tricks undiscovered?

Re: The Visual ARM1

#3
Would be nice if somebody with the knowledge could do some kind of guided tour where they would go over some of the structures what they are and what they do. For me as a software developer with no knowledge of electronics it looks nice but thats about it.

Re: The Visual ARM1

#4
This is probably really amazing if you know what you're looking at. I have no idea what any of the parts do and what code is being run.

I would love to see someone give a "guided tour" though all the parts of the CPU, and step through some assembly to see how the things works.

I can see from the picture there are distinct areas, and large arrays of gates that might be memory or adders or I don;t know. It would be amazing to see an add interaction actually wire up some memory to some gate and see the result propagate through the CPU.

Re: The Visual ARM1

#5
What code is it running? When I click play, it seems to be in a tight loop from code at addresses 24-34.

Maybe it's simulating an entire OS run - if I leave it on for a few years it will finish zeroing the RAM and start booting :)

Re: The Visual ARM1

#6

This is probably really amazing if you know what you're looking at. I have no idea what any of the parts do and what code is being run. I would love to see someone give a "guided tour" though all the parts of the CPU, and step through some assembly to see how the things works. I can see from the picture there are distinct areas, and large arrays of gates that might be memory or adders or I don;t know. It would be ama…

He hasn't written anything about this ARM1 (yet), but Ken Shirriff (http://www.righto.com/) has some very interesting gate-level explanations about parts of other old processors scanned by the same Visual6502 project. Take a look, for instance, at these posts: http://www.righto.com/search/label/6502

Re: The Visual ARM1

#7
post #3

Would be nice if somebody with the knowledge could do some kind of guided tour where they would go over some of the structures what they are and what they do. For me as a software developer with no knowledge of electronics it looks nice but thats about it.

So the ARM1 had no cache & no microcode. 15 user visible 32 bit registers, with some (Nos 10-15 IIRC) duplicated for use during interrupts (FIQ mode). I think a couple more registers were also duplicated for use during other interrupts. So bottom left looks like it might be the register bank. The square block at top right might be the instruction decode PLA?

There’s a block diagram for the ARM2 in this document: http://www.riscos.com/support/developers/asm/cpu.html I believe the ARM was much the same, with the exception of fewer banked registers & no integer multiplier, so the dedicated could probably trace the paths and make some guesses about where each block is located.

Re: The Visual ARM1

#8
post #3

Would be nice if somebody with the knowledge could do some kind of guided tour where they would go over some of the structures what they are and what they do. For me as a software developer with no knowledge of electronics it looks nice but thats about it.

This one is pretty good: http://wiki.nesdev.com/w/index.php/Visual_circuit_tutorial

Re: The Visual ARM1

#9
post #7
post #3

Would be nice if somebody with the knowledge could do some kind of guided tour where they would go over some of the structures what they are and what they do. For me as a software developer with no knowledge of electronics it looks nice but thats about it.

So the ARM1 had no cache & no microcode. 15 user visible 32 bit registers, with some (Nos 10-15 IIRC) duplicated for use during interrupts (FIQ mode). I think a couple more registers were also duplicated for use during other interrupts. So bottom left looks like it might be the register bank. The square block at top right might be the instruction decode PLA? There’s a block diagram for the ARM2 in this document: http…

Yes, I think bottom left is the register bank -- you can see it is 25 elements horizontally by 32 vertically, and there are 25 total registers listed on the right (r0..r15 plus the svc/irq/fiq mode-banked copies of some of r10 through r14). Also I'm pretty sure the program counter (r15) is the far-left-hand-side, because that first row does not have cells in the bottom two bit positions or the top six (ARM1 used 26-bit addresses, hence the missing top six, and PC values are always 4-aligned, so no bottom two bits).
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