Nibbler 4 Bit CPU
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Nibbler 4 Bit CPU
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Re: Nibbler 4 Bit CPU
#2Wow!
Re: Nibbler 4 Bit CPU
#3Nibbler also lacks any address registers, which means it can’t support any form of indirect addressing, nor a hardware-controlled stack. All memory references must use absolute addresses. Wow!
And still it runs with 1MHz, the same speed of my first computer ;) with a dedicated integrated CPU.
Re: Nibbler 4 Bit CPU
#4Nibbler also lacks any address registers, which means it can’t support any form of indirect addressing, nor a hardware-controlled stack. All memory references must use absolute addresses. Wow!
Yes, it is a very limited design, but the thought, that it was implemented just using (very few!) standard 74xxx TTL logic is really amazing. And still it runs with 1MHz, the same speed of my first computer ;) with a dedicated integrated CPU.
Re: Nibbler 4 Bit CPU
#5Earlier quoted context omitted.
Yes, it is a very limited design, but the thought, that it was implemented just using (very few!) standard 74xxx TTL logic is really amazing. And still it runs with 1MHz, the same speed of my first computer ;) with a dedicated integrated CPU.
It's implemented using a few standard 74xxx TTL logic chips and a 256x16 microcode ROM. It's important not to ignore the microcode ROM because that's where all the smarts that turn it from an ALU unit and a bunch of registers and miscellaneous logic into a CPU that can actually execute instructions. All of the instruction decoding and the sequencing of all the operations that make up a CPU cycle is done directly by t…
I think, you can not give this design a negative, because it is much simpler than early microprocessors.
I forgot about the ROM, and apologize for it.
Re: Nibbler 4 Bit CPU
#6Earlier quoted context omitted.
Yes, it is a very limited design, but the thought, that it was implemented just using (very few!) standard 74xxx TTL logic is really amazing. And still it runs with 1MHz, the same speed of my first computer ;) with a dedicated integrated CPU.
It's implemented using a few standard 74xxx TTL logic chips and a 256x16 microcode ROM. It's important not to ignore the microcode ROM because that's where all the smarts that turn it from an ALU unit and a bunch of registers and miscellaneous logic into a CPU that can actually execute instructions. All of the instruction decoding and the sequencing of all the operations that make up a CPU cycle is done directly by t…
Re: Nibbler 4 Bit CPU
#7Earlier quoted context omitted.
Yes, it is a very limited design, but the thought, that it was implemented just using (very few!) standard 74xxx TTL logic is really amazing. And still it runs with 1MHz, the same speed of my first computer ;) with a dedicated integrated CPU.
It's implemented using a few standard 74xxx TTL logic chips and a 256x16 microcode ROM. It's important not to ignore the microcode ROM because that's where all the smarts that turn it from an ALU unit and a bunch of registers and miscellaneous logic into a CPU that can actually execute instructions. All of the instruction decoding and the sequencing of all the operations that make up a CPU cycle is done directly by t…
(Meanwhile, current Intel processors have 2 MiB microcode files.)
Re: Nibbler 4 Bit CPU
#8Earlier quoted context omitted.
It's implemented using a few standard 74xxx TTL logic chips and a 256x16 microcode ROM. It's important not to ignore the microcode ROM because that's where all the smarts that turn it from an ALU unit and a bunch of registers and miscellaneous logic into a CPU that can actually execute instructions. All of the instruction decoding and the sequencing of all the operations that make up a CPU cycle is done directly by t…
Two 16 KiB ROMs, actually. (Meanwhile, current Intel processors have 2 MiB microcode files.)
1: https://fsf.org/blogs/community/active-management-technology
Re: Nibbler 4 Bit CPU
#9Earlier quoted context omitted.
It's implemented using a few standard 74xxx TTL logic chips and a 256x16 microcode ROM. It's important not to ignore the microcode ROM because that's where all the smarts that turn it from an ALU unit and a bunch of registers and miscellaneous logic into a CPU that can actually execute instructions. All of the instruction decoding and the sequencing of all the operations that make up a CPU cycle is done directly by t…
The ROM is basically acting as an FPGA. After all, an FPGA is just a load of units of small ROM areas, with the inputs and outputs linked to each other. If all you need to implement your circuit is a single unit, then a small ROM chip is quite sufficient instead.
No, it doesn't; neither from a practical, nor from a theoretical point of view. Theoretically, ROMs are equivalent to the class of pure, total, mathematical functions (i.e., each input value maps to exactly one output value), while FPGAs are equivalent to the class of deterministic finite automata, because they contain internal state.
> After all, an FPGA is just a load of units of small ROM areas, with the inputs and outputs linked to each other.
You're forgetting the memory elements – they're crucial to the functionality of FPGAs.
Re: Nibbler 4 Bit CPU
#10Earlier quoted context omitted.
Two 16 KiB ROMs, actually. (Meanwhile, current Intel processors have 2 MiB microcode files.)
to be fair, that's 2 MiB code that is the base of the other os you never heard of, the IME, AMT and their backdoor capabilities [1] 1: https://fsf.org/blogs/community/active-management-technology