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ASML and Samsung seal deal on 2nm chips

koreaherald.com

91–97 of 97 posts

Re: ASML and Samsung seal deal on 2nm chips

#91
post #7

Everything over the last years tells me we are very close to the end game in chip production. 1. power stopped scaling 2. clocks stopped - 4x over 20 years? 3. node names became fiction. 4. EUV now differentiates the top from everyone else. 5. IPC improvements are a trickle. 6. Tons of non-moores law ideas are here: A) GPUs B) chiplets C) stacked die D) specialized accelerators 7. Governments are now involved in divi…

Point 3 always makes me unreasonably (or perhaps reasonably) angry.

Re: ASML and Samsung seal deal on 2nm chips

#92
post #18

Earlier quoted context omitted.

It's impossible for growth to be exponential indefinitely. Eventually it'll end up as a sigmoid curve. Secondly, progress isn't smooth. It comes in phases and leaps, and it's possible for it to stagnate for a long time.

Certainly. We're near the top of the computational capacity for silicon chips. However, the computational capacity of a cubic centimeter of our universe is mind bogglingly enormous, what we can do now is a drop of water in the ocean (or much much smaller). There are lots of other ways to compute and many of them in active development. Folks have been saying exponential growth is over for many decades now. It may have…

I think we'll start with a cubic cm of silicon before space.

However if you like the topic and want to read some fiction involving it, try the Jean Le Flambeur trilogy by Hannu Rajanieme (sp?)

Re: ASML and Samsung seal deal on 2nm chips

#93

Just to head off the inevitable comments about how 2nm isn't really 2nm: yes, we know, it's just a convention in the industry to indicate relative performance. It's basically a marketing term, more than anything else. The numbers VLSI engineers actually care about are things like millions of transistors per square millimeter (MTr/mm^2), power per bit in picojoules (pJ), transistor rise times in nanoseconds, etc... In…

Only CPP and MMP really matter. Different foundries offer slightly different numbers for either, usually if they're better at one, they're slightly worse at the other.

This was interesting, though idt it's been standardised: https://spectrum.ieee.org/a-better-way-to-measure-progress-i.... Measure node by factors of density of logic, memory, interconnects all together, which is pretty well balanced.

Re: ASML and Samsung seal deal on 2nm chips

#94

> ASML is expected to supply 10 units of the High-NA EUV equipment to the market next year, and Intel has reportedly secured six of them ouch

I believe that's just the pilot (ie training) version with the full version coming a bit later after

Re: ASML and Samsung seal deal on 2nm chips

#95

How far does a $762 million deal get you? Doesn't seem like such a huge sum for priority access to next gen 2nm machines, but also hard to judge as a layperson...

Lmao that's only like the price of 2 of the new high NA EUV machines. I believe they're slated to be 350-400M€ ea.

Re: ASML and Samsung seal deal on 2nm chips

#96

I wonder why Nvidia doesn't establish it's own fab business. It might be a good fit for them.

Economics, I'm guessing. They got enough money floating around recently that they would've done it by now, if it made em more money.

Their pockets are flush from crypto and now AI.

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