91–100 of 222 posts
I know the die sizes didn't decrease much, around 10% or so. And R&D increase is surely surpassing inflation.
The perfect time to shed ourselves of the idea that "optimisation is a waste of dev-time". Mobile computing was the last godsent t actually rethink performance a little bit, but we still have a lot of relatively low-hanging fruit. I sometimes dream about a month-of-no-new-features, where everyone would just have a bit of time to clean up and improve on existing stuff.
I still regularly use old systems for fun. I grew up with Macs, so that’s the point of reference. When I use these old systems, I pine for a few specific things I’m used to on newer systems—but it almost feels like nitpicking.
The things that I really want from a computer are pretty basic. Like good, consistent copy/paste and drag ’n’ drop, good autosave, good file browser, that sort of thing. It seems like new, half-baked stuff got dropped in our laps before the basics really got perfected.
Up until this year, CPU was never my limiting factor. We always used multithreaded or GPUs. This year has seen a need for a decent CPU for occasions where we must single thread. Both Local AI and python development. For so long, we never maxed out our CPU.
The perfect time to shed ourselves of the idea that "optimisation is a waste of dev-time". Mobile computing was the last godsent t actually rethink performance a little bit, but we still have a lot of relatively low-hanging fruit. I sometimes dream about a month-of-no-new-features, where everyone would just have a bit of time to clean up and improve on existing stuff.
More like a year - the performance rot runs deep.
Even with the latest and greatest 4k, HDR, wide colour, display, no app should ideally use more then 256 MB of memory by those standards, unless it's even more complex.
This "stagnation" is nothing like the stagnation during AMD's poorly performing Bulldozer era (the post Athlon era) where they were consistently beat by Intel's offerings and there was a general lack of innovation in the prosumer space. During that era for the most part Intel's i7 prosumer CPUs started with 4 cores with the Bloomfield Nehalem chips in 2008 (which at the time were awesome and a game changer) and ended…
This "stagnation" is nothing like the stagnation during AMD's poorly performing Bulldozer era (the post Athlon era) where they were consistently beat by Intel's offerings and there was a general lack of innovation in the prosumer space. During that era for the most part Intel's i7 prosumer CPUs started with 4 cores with the Bloomfield Nehalem chips in 2008 (which at the time were awesome and a game changer) and ended…
Can confirm, I bought a pair of desktops for work in 2012 with Ivy Brige i7's that could "turbo boost" to 3.9 GHz indefinitely without overclock. I did not feel a real upgrade need until the 32 core Threadripper machines came out in 2018.
Not because anything I was currently doing with my computer was becoming too slow, but because I wanted to do new things (VR). A shame, I wanted to run that thing into the ground.
I've got my old system sat spare, I'm not sure what to do with it.
In fact the CPU stagnation is worse. In contrast to the shrinking chip size and higher frequencies of past scaling laws, CPU core count does not easily translate to performance gains. It needs specialized and careful designed software to tap the capability. In fact if CPU core count did translate more easily to performance gains I think already with the existing CPU's we'd have a fairly signficant one-time boost. May…
CPU core count does translate to performance gains but the popular software architecture idioms most people use are incapable of taking advantage of large numbers of cores. The gap between the performance you typically see and what is possible with proper software architecture and performance engineering is orders of magnitude in scale. A lot of performance and scalability is left on the table. We've known how to sca…
The perfect time to shed ourselves of the idea that "optimisation is a waste of dev-time". Mobile computing was the last godsent t actually rethink performance a little bit, but we still have a lot of relatively low-hanging fruit. I sometimes dream about a month-of-no-new-features, where everyone would just have a bit of time to clean up and improve on existing stuff.
Microsoft gets pressure from their hardware partners to keep up the hardware replacement cycle, and they themselves of course get a cut of that via OS licenses.
Phone manufacturers seemingly invented "Always On Displays" to also cause people to start to think they needed a new phone or battery just a year/18 months into owning their device. Christ what a waste of power for such little value delivered! My wife said her new S23+ would barely last a day - so I turned off the always on display option, and now it lasts 2.5/3 daysish of normal usage.
It's a slightly different story with laptops, where battery life is an important feature. You'd think battery life would be important for phones too.
Earlier quoted context omitted.
tl;dr New materials can help, but "resistive losses" aren't really the driving factor. The energy is a mix of leakage current and active current. Leakage current can be thought of as resistance - it's how much current flows through a transistor that's off. This can be better based on the material, but gets harder with smaller transistors. (Thinking about quantum tunneling as a resistance is good to get intuition, but…
I thought leakage current would be the "DC" loss that is independent of frequency, like we had in old bipolar logic. Isn't it fair to characterize the cmos/fet switching losses as resistance to moving the charges around? I understand leakage will go up if we increase voltages to support higher switching speeds, but aren't there still a lot of losses that happen with logic transitions and reduce when the states are st…
Not really. It makes more sense to think about it as filling and emptying capacitors. You are charging the gate capacitance up to the supply voltage, then dumping that charge to discharge the gate to 0 again. The energy of each capacitance that gets charged and dumped is CV^2/2, which happens for each logic transition.
> I realize it we can't move charges around for free, but in some fantasy superconducting-fet logic circuit, wouldn't the power consumption be reduced?
If there was no resistance when distributing charge, it would help a bit, but not enough to change the clock frequency by more than 20%, assuming that the fantasy superconducting-fet had normal leakage and gate capacitance.