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TSMC Kicks Off Volume Production of 7nm Chips

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Re: TSMC Kicks Off Volume Production of 7nm Chips

#92
post #14
post #4

Wow. I still remember being amazed when micron widths came out. 7nm is close to a miracle. Semiconductor manufacturing improvements like this really have enabled the whole tech world improvements of the last few decades.

There isn't any feature of the transistors taht are 7nm wide, the smallest feature IIRC is the interconnect, which is about 30n-40nm. "7nm" is marketing wankery. https://en.wikichip.org/wiki/7_nm_lithography_process

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Re: TSMC Kicks Off Volume Production of 7nm Chips

#93
post #90

This makes me hope that maybe all those chipmakers will finally move on from that extremely long-lived 28nm node. It has been heavily used since 2011-2012 and even companies like Qualcomm have been using it as recently as last year in the lower-end range of products. Companies like Allwinner, Rockchip, Amlogic have yet to release a single chip on newer nodes. What this means is that the 28nm node has been the cheapes…

28nm will be around for a long time. There are SoCs up at 130 or 180nm still because for what they need those are the cheapest way to go. 28 is as far as you go with planar transistors and single (or is it double?) patterning. The 20-22 node is not popular because it kinda sucks for both planar and FinFET designs. I think 14-16 will be around for a long time too because of the increased complexity of going lower.

While the end of scaling is a bummer, it will be nice to have the industry settle on a few common nodes that are mature and very well understood.

Re: TSMC Kicks Off Volume Production of 7nm Chips

#94
post #78

Earlier quoted context omitted.

So, what does determine the "marketing" nomenclature for a given process node, if not a specific feature size or wavelength? I find it impossible to believe that some obscure semiconductor industry people get together in a hidden smoke-and-particulate-matter-free room, come up with a completely-random number, and name their process after it.

It used to be a specific feature size: the length of the gate. But, even as the wheels came off of that pretty quickly, the convention stayed pretty simple and familiar: each process node halves the size of the one before it - you can print double the number of transistors at the smaller process node. To make the math work out, that means each process node "name" is sqrt(1/2) ~= 0.7x smaller than the last, which give…

Intel's nm numbers are also pure marketing, I believe.

Re: TSMC Kicks Off Volume Production of 7nm Chips

#95
post #29

Earlier quoted context omitted.

I think bits of SRAM per unit of area is a benchmark that some people use, as it corresponds to something that's meaningful and measurable.

The problem is even that is flawed as things are going three dimensional.

So just start measuring in bits of SRAM per unit of volume?

Re: TSMC Kicks Off Volume Production of 7nm Chips

#96
post #67

Earlier quoted context omitted.

Well, after a while or is sort of public knowledge that 10nm Intel is about the same as 12nm AMD, etc. But yes, the industry needs standardized advertising practices badly.

Uh, it's the other way around. 10nm Intel is 7nm global foundries. 22nm Intel is superior to 14nm global foundries. Intel is the one that doesn't fudge their numbers.

Even Intel's numbers are just marketing, however.

Everyone is fudging the numbers...

SemiWiki has a good overview of Intel 10nm vs GF 7nm:

https://www.semiwiki.com/forum/content/7191-iedm-2017-intel-...

Re: TSMC Kicks Off Volume Production of 7nm Chips

#97
post #79

Earlier quoted context omitted.

>- it's both fascinating and terrifying the trouble that EUV brings It is only peanuts in comparison to what is to come. The "nuclear option" on the table is to build a whole fab around a freaking synchrotron light source.

I watched the video recommended by awalton, and it's definitely as insane as he says it is. I can't believe a synchrotron would be that much more expensive, considering that a single storage ring can have an arbitrary number of output ports.

The main issue with using a synchrotron or Free Electron Laser EUV source might not be so much about the technology, but more about the mindset of the clients (Samsung, TSMC, Global Foundries, Intel). Up until now lithography has been something they would buy as a "box" which would be shipped to their fab, "plugged in" and commissioned.

A Free Electron Laser EUV source would be a facility on it's own, similar in size to a small powerplant built adjacent to your fab, and multiplexed to a dozen or so EUV wafer scanners, that's quite a different endeavor.

Re: TSMC Kicks Off Volume Production of 7nm Chips

#98

Fun stuff. I've got a key chain with an 80186 die, and a couple of the binders from Microprocessor Forum when they had dies on the cover. The features on those chips are "huge" compared to these things. I suspect a die using one of these processes that was big enough (say 100 sq mm) would just look like a mirror with chromatic interference lines running across it. This announcement also bookends nicely with the first…

I have an IBM pin with a 1 Mbit chip. It was a big deal in the 80’s

Re: TSMC Kicks Off Volume Production of 7nm Chips

#99
post #57

Earlier quoted context omitted.

I think you linked to a flip chip---you would expect a mirror finish from the bulk silicon side.

Ah yes you're right of course. Has there been anything in the past few years made on modern processes with the die actually visible? Desktop/laptop CPUs and GPUs have all been flip chip for at least the past decade, mobile SoCs are package on package, most other stuff is encased in plastic.

Some of the RF processes. The HMC6300 is a mmWave flip chip with visible (to the eye) structures. Even then, it’s limited to passive structures, and maybe the PA output transistors.

Re: TSMC Kicks Off Volume Production of 7nm Chips

#100
post #65

Earlier quoted context omitted.

I've always assumed that "XX nm" doesn't represent the geometry of any particular feature of the end product, but something related to the wavelength of the radiation used for the imaging process. Maybe it corresponds to the principle emission line of the light source (synchrotron?) In spectral terms, 7 nm is near the border between hard UV radiation and soft X-rays.

This is not correct at all. Most chips made today are created with multipatterning processes using 193nm lasers and optical masks, known in the field as "Deep Ultraviolet Lithography" (DUV(L)). The industry is pushing towards replacing DUV (which has been pushed to its extremes) with "Extreme Ultraviolet Lithography" (EUV(L)), which uses a 13.5 nm light source (just watch https://www.youtube.com/watch?v=5yTARacBxHI -…

He says they hope to do 100 wafers per hour. I wonder how many dies will be on a wafer.
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