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FPGAs Need a New Future

allaboutcircuits.com

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Re: FPGAs Need a New Future

#81

Post by PunchyHamster »

exmadscientist wrote: post #13

FPGAs need their "Arduino moment". There have been so, so, so many projects where I've wanted just a little bit of moderately-complicated glue logic. Something pretty easy to dash off in VHDL or whatever. But the damn things require so much support infrastructure: they're complicated to put down on boards, they're complicated to load bitstreams in to, they're complicated to build those bitstreams for, and they're com…

They can't, by nature of the proprietary bitstream. Arduino was only built thanks to ability to do whatever they wanted with open source compilers

Re: FPGAs Need a New Future

#82

Post by oscillonoscope »

CamperBob2 wrote: post #57

Here’s the first big misconception: HDL is hardware. It isn’t. HDL is software and should be managed like software. Yes, that's certainly a big misconception. Maybe not the one the author meant to call out, but... yes, a big misconception indeed.

Its both depending on context. If HDL becomes custom silicon then it needs to be treated like hardware. If you can easily deploy field updates to your device then it's no different than any other firmware

Re: FPGAs Need a New Future

#83

Post by oscillonoscope »

VonTum wrote: post #21
j-pb wrote: post #9

Earlier quoted context omitted.

VHDL is ok, Verilog is a sin. The issue isn't the languages, it's the horrible tooling around them. I'm not going to install a multi GB proprietary IDE that needs a GUI for everything and doesn't operate with any of my existing tools. An IDE that costs money, even though I already bought the hardware. Or requires an NDA. F** that. I want to be able to do `cargo add risc-v` if I need a small cpu IP, and not sacrifice…

Well really, the language _is_ the difficulty of much of hardware design, both Verilog and VHDL are languages that were designed for simulation of hardware, and not synthesis of hardware. Both languages have of similar-but-not-quite ways of writing things, like blocking/nonblocking assigns causing incorrect behavior that's incredibly difficult to spot on the waveform, not being exhaustive in assigns in always blocks…

Language really isn't the difficulty. That's why there's a thousand alt-HDLs that have been used for little more than blinking LEDs.

Re: FPGAs Need a New Future

#84

Post by PunchyHamster »

exmadscientist wrote: post #54
tverbeure wrote: post #47

Earlier quoted context omitted.

> sometimes … sometimes … sometimes … And sometimes you need support for multiple IO standards. I don’t understand what point you’re trying to get across. But if all you need is LVCMOS33, why do you not use a MAX10 FPGA with built-in voltage regulator? Or a similar FPGA device from GoWin that is positioned as a MAX10 alternative? What is wrong with those? > JTAG On our production line, we use JTAG to program the FPGA…

> I don’t understand what point you’re trying to get across. My point is twofold: 1. There are many niches. Your main needs are not the same as my main needs. And my needs are poorly met by existing products, so I want to see something better. (And I do buy chips.) 2. All of this is way, way harder than it needs to be. It could be easy, but it isn't. Everything is possible right now. But I wasn't random when I used t…

> It did not make anything really hard suddenly become easy.

It did. Onboarding people onto embedded programmer.

You just ran it, wrote few lines and you had working blinky. Write some more and you have useful toy. You could even technically make products with it but going from this to C++ was easier coz you already know what you could do, just needed to go thru pain of switching the toolchain once you're already invested.

Compare that to "you need to setup compiler, toolchain, SDK, figure out how to program the resulting binary, map the registers to your devboard pins etc."

Re: FPGAs Need a New Future

#85

Post by checker659 »

mgilroy wrote: post #8

The issue with the software team using an FPGA is that software developers generally aren't very good at doing things in parallel. They generally do a poor job in implementing hardware. I previously taught undergraduates VHDL, the software students generally struggles with the dealing with things running in parallel. VHDL and Verilog are used because they are excellent languages to describe hardware. The tools don't…

> software developers generally aren't very good at doing things in parallel

If only hardware people would stop stereotyping. Also, do you guys not use use formal tools (BMC etc) now? Who do you think wrote those tools? Heck all the EDA stuff was designed by software people.

I just can't with the gatekeeping.

(Btw, this frustration isn't just pointed at you. I find this sentiment being parroted allover /r/FPGA on reddit and elsewhere. It's damn frustrating to say the least. Also, the worst thing is all the hardware folks only know C so they think all programming is imperative. VDHL is Ada for crying out loud.)

Re: FPGAs Need a New Future

#86

Post by checker659 »

ThrowawayR2 wrote: post #33
tyami94 wrote: post #28

Earlier quoted context omitted.

I can't say I agree with you here, if anything FPGAs and general purpose microprocessors go hand in hand. It would be an absolute game changer to be able to literally download hardware acceleration for a new video codec or encryption algorithm. Currently this is all handled by fixed function silicon which rapidly becomes obsolete. AV1 support is only just now appearing in mainstream chips after almost 8 years, and so…

And you think that a downloaded codec on an FPGA would perform anywhere close to custom silicon? Because it won't; configurability comes at a steep cost.

FPGAs are more like CGRAs these days. With the right DSP units, it could absolutely be competitive with custom silicon.

Re: FPGAs Need a New Future

#87

Post by gnull »

mgilroy wrote: post #8

The issue with the software team using an FPGA is that software developers generally aren't very good at doing things in parallel. They generally do a poor job in implementing hardware. I previously taught undergraduates VHDL, the software students generally struggles with the dealing with things running in parallel. VHDL and Verilog are used because they are excellent languages to describe hardware. The tools don't…

> VHDL and Verilog are used because they are excellent languages to describe hardware.

Maybe they were in the 80. In 2025, language design has moved ahead quite a lot, you can't be saying that seriously.

Have a look at how clash-lang does it. It uses functional paradigm, which is much more suitable for circuits than pseudo-pricedural style of verilog. You can also parameterize modules by modules, not just by bitness. Take a functional programmer, hive him clash and he'll have no problems doing things in parallel.

Back when I was a systems programmer, I tried learning system verilog. Had zero conceptual difficulty, but I just couldn't justify to myself why I should spend my time on something so outdated and badly designed. Hardware designers at my company at the time were on the other hand ok with verilog because they haven't seen any programming languages other than C and Python, and had no expectations.

Re: FPGAs Need a New Future

#88

Post by random3 »

malmeloo wrote: post #22

One big issue with FPGAs is how annoying it is to learn how to use them. I did a course on embedded systems a few years ago and nobody could truly get to enjoy it because we spent most of our time downloading and installing huge toolchains, waiting for synthesis and PnR to complete and debugging weird IDE issues. We need to open up the space to allow people to develop better solutions than what these companies are fo…

I just remembered I have a Xilinx I bought over a decade ago lying around somewhere. I don't remember ever plugging it in, but I do both the excitement of getting it and trying to figure out the toolchain and getting confused.

Re: FPGAs Need a New Future

#89

Post by dsab »

I had the misfortune of working with the Xilinx Vivado environment, it's a fucking garbage, the software is straight out of the 90s, everything is glued together with shell scripts and the TCL scripting language, the IDE throws thousands of warnings and errors while building a sample project, the documentation is missing or spread over 150 PDFs, if the manufacturer of your evaluation board prepared an example for the previous version of Vivado, you must have two installations, which is probably about 2 * 100GB, if you want to keep anything under version control, you have to use some external tools, it's all absurd.

Re: FPGAs Need a New Future

#90

Post by mitthrowaway2 »

tverbeure wrote: post #60
exmadscientist wrote: post #49

Earlier quoted context omitted.

No, it wasn't. Those are mostly available in PLCC and DIP packages and even if you can get the SOIC/TSSOP versions they still cost $1.20 each at 10k volume. That's flat-out unacceptable for 99% of the things I do. The entire rest of the board I was talking about was $4.60. Processor included. $1.20 is not going to fly.

“Reduces use case and requirements to something impossibly niche and low volume then yells at the clouds.” Anyway, just tie the output of 21 emitter followers together, add a resistor and - tadaaa - 21 input OR!

If only someone could make a single part that is very versatile, so that it could get production economies of scale while solving all the thousands of different random problems various people might have, whether they need a 21-input OR or something else. Like an array of gates, but field-programmable!

(That's a pretty steep price target even for a small FPGA though. With 16 pins maybe, but with 25?)

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