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AMD claims Arm ISA doesn't offer efficiency advantage over x86

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Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#81

Post by bpye »

tliltocatl wrote: post #75
exmadscientist wrote: post #2

This is an entirely uncontroversial take among experts in the space. x86 is an old CISC-y hot mess. RISC-V is a new-school hyper-academic hot mess. Recent ARM is actually pretty good. And none of it matters, because the uncore and the fabrication details (in particular, whether things have been tuned to run full speed demon or full power sipper) completely dominate the ISA. In the past x86 didn't dominate in low powe…

Nitpick: uncore and the fabrication details dominate the ISA on high end/superscalar architectures (because modern superscalar basically abstract the ISA away at the frontend). On smaller (i. e. MCU) cores x86 will never stand any chance.

Not that it stopped Intel trying - https://en.m.wikipedia.org/wiki/Intel_Quark

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#82

Post by [deleted] »

mmis1000 wrote: post #45
w4rh4wk5 wrote: post #6

Ok. When will we get the laptop with AMD CPU that is on par with a Macbook regarding battery life?

I think it would only be fair to compare it when running some more resource efficient system. Steamdeck with Windows 11 and SteamOS is a whole different experience. When running SteamOS and doing web surfing, the fan don't even really spin at all. But when running windows 11 and do the exact same thing, it just spins all the time and becomes kinda hot.

[deleted]

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#83

Post by kccqzy »

devnullbrain wrote: post #25
WithinReason wrote: post #10

Since newer CPUs have heterogeneous cores (high performance + low power), I'm wondering if it makes sense to drop legacy instructions from the low power cores, since legacy code can still be run on the other cores. Then e.g. an OS compiled the right way can take advantage of extra efficiency without the CPU losing backwards compatibility

Interesting but it would be pretty rough to implement. If you take a binary now and run it on a core without the correct instructions, it will SIGILL and probably crash. So you have these options: Create a new compilation target - You'll probably just end up running a lot of current x86 code exclusively on performance cores to a net loss. This is how RISC-V deals with optional extensions. Emulate - This already happe…

The "ask for permission" approach doesn't work because programs don't expect the capability of a CPU to change. If a program checked a minute ago that AVX512 is available, it certainly expects AVX512 to be continually available for the lifetime of the process. That means chaos if the OS is moving processes between performance and efficiency cores.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#84

Post by tapoxi »

epolanski wrote: post #80
exmadscientist wrote: post #2

This is an entirely uncontroversial take among experts in the space. x86 is an old CISC-y hot mess. RISC-V is a new-school hyper-academic hot mess. Recent ARM is actually pretty good. And none of it matters, because the uncore and the fabrication details (in particular, whether things have been tuned to run full speed demon or full power sipper) completely dominate the ISA. In the past x86 didn't dominate in low powe…

I have a hard time believing this fully: more custom instructions, more custom hardware, more heat. How can you avoid it?

Since the Pentium Pro the hardware hasn't implemented the ISA, it's converted into micro ops.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#85

Post by gigatexal »

tracker1 wrote: post #65
gigatexal wrote: post #61

Earlier quoted context omitted.

that ryzen laptop chip perform it'll just do it at a higher perf/watt than the apple chip will... and on a laptop that's a key metric.

And 20% or so of that difference is purely the fab node difference, not anything to do with the chip design itself. Strix Halo is a much better comparison, though Apple's M4 models do very well against it often besting it at the most expensive end. On the flip side, if you look at servers... Compare a 128+core AMD server CPU vs a large core ARM option and AMD perf/watt is much better.

Wait are you saying the diff in perf per watt from apple arm to x86 is purely on fab leading edge ness?

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#86

Post by ahartmetz »

torginus wrote: post #18
exmadscientist wrote: post #2

This is an entirely uncontroversial take among experts in the space. x86 is an old CISC-y hot mess. RISC-V is a new-school hyper-academic hot mess. Recent ARM is actually pretty good. And none of it matters, because the uncore and the fabrication details (in particular, whether things have been tuned to run full speed demon or full power sipper) completely dominate the ISA. In the past x86 didn't dominate in low powe…

I remember reading this Jim Keller interview: https://web.archive.org/web/20210622080634/https://www.anand... Basically the gist of it is that the difference between ARM/x86 mostly boils down to instruction decode, and: - Most instructions end up being simple load/store/conditional branch etc. on both architectures, where there's literally no difference in encoding efficiency - Variable length instruction has pretty…

Variable length decoding is more or less figured out, but it takes more design effort, transistors and energy. They cost, but not a lot, relatively, in a current state of the art super wide out-of-order CPU.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#87

Post by masfuerte »

Findecanor wrote: post #22
mananaysiempre wrote: post #8

Earlier quoted context omitted.

> x86 didn't dominate in low power because Intel had the resources to care but never did Remember Atom tablets (and how they sucked)?

You mean Atom tablets running Android ? I have a ten-year old Lenovo Yoga Tab 2 8" Windows tablet, which I still use at least once every week. It is still useful. Who can say that they are still using a ten-year old Android tablet?

I still use my 2015 Kindle Fire (which runs Android) for ebooks and light web browsing.

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#88

Post by kragen »

kccqzy wrote: post #79
WithinReason wrote: post #10

Since newer CPUs have heterogeneous cores (high performance + low power), I'm wondering if it makes sense to drop legacy instructions from the low power cores, since legacy code can still be run on the other cores. Then e.g. an OS compiled the right way can take advantage of extra efficiency without the CPU losing backwards compatibility

This is the flip side of Intel trying to drop AVX512 on their E cores in the 12th generation processors. It didn't work. It requires the OS to know which processes need AVX512 before they get run. And processes themselves use cpuid to determine the capability of processors and they don't expect it to change. So you basically must determine in advance which processes can be run on E cores and never migrate between cor…

What if the kernel handled unimplemented instruction faults by migrating the process to a core that does implement the instruction and restarting the faulting instruction?

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#89

Post by DeepYogurt »

pavlov wrote: post #41
wlesieutre wrote: post #15

Earlier quoted context omitted.

VIA used to make low power x86 processors

And Transmeta…

Transmeta wasn't x86 internally but decoded x86 instructions. Retrobytes did a history of transmeta not too long ago and the idea was essentially to be able to be compatible with any cpu uarch. Alas by the time it shipped only x86 was relevant. https://www.youtube.com/watch?v=U2aQTJDJwd8

Re: AMD claims Arm ISA doesn't offer efficiency advantage over x86

#90

Post by somanyphotons »

exmadscientist wrote: post #2

This is an entirely uncontroversial take among experts in the space. x86 is an old CISC-y hot mess. RISC-V is a new-school hyper-academic hot mess. Recent ARM is actually pretty good. And none of it matters, because the uncore and the fabrication details (in particular, whether things have been tuned to run full speed demon or full power sipper) completely dominate the ISA. In the past x86 didn't dominate in low powe…

I'd love to see what would happen if AMD put out a chip with the instruction decoders swapped out for risc-v instruction decoders
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