I’m guessing back Linux works but most precompiled stuff not?
Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
81–90 of 158 posts
Re: Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
#82Is anyone making RISC-V SoCs outside of China? Trade restrictions have given China serious incentives to make RISC-V CPUs domesticly, unlike every other country that can just buy AMD64 and ARM chips. Given the geopolitics of the situation, while RISC-V is gaining marketshare in the microcontroller space, it looks like RISC-V will be the Chinese-bloc CPU ISA while the west sticks with what we already have.
The US doesn't like it, so they may change the rules again. which becomes a bit of a whackamole.
Sanctions like these gives China a lot more incentive for a reunification with Taiwan. Some say the fabs are rigged to blow if this was to occur. If so, it would have massive negative consequences for the world. Where as new management would have far less of an impact, though some countries might find themselves under sanctions on what type of chips they could buy.
Re: Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
#83[flagged]
Re: Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
#84Is there a reason for a dearth of PCIe connectivity on these small SoCs? Is it difficult to implement? Perhaps a pincount issue? The big problem with these small and cheap systems is that you can't connect NVMe drives to them and you pay a huge performance penalty.
most SOC CPUs don't really have a huge PCIe capability to begin with- possibly 1 or 2 lanes total; and you probably want USB, Ethernet etc; You wouldn't get very much performance anyway, as you only want many PCIe links in order to get bandwidth through them which you're unlikely to do on an anaemic CPU. to-wit: you wouldn't get good NVMe performance even if you had the pinouts and the CPU had 4x Lanes of PCIe anyway…
Re: Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
#85Is anyone making RISC-V SoCs outside of China? Trade restrictions have given China serious incentives to make RISC-V CPUs domesticly, unlike every other country that can just buy AMD64 and ARM chips. Given the geopolitics of the situation, while RISC-V is gaining marketshare in the microcontroller space, it looks like RISC-V will be the Chinese-bloc CPU ISA while the west sticks with what we already have.
RISC-V is becoming a worldwide interop standard, and a real one, namely royalty free and which will be stable in time once we get all the "now we know" features, and all that at the ISA level (x86_64 and ARM are _NOT_ worldwide royalty free). And don't be mistaken, there is no perfect ISA (it is said "average"), it does not exist, only a set of trade-offs and compromises which will not fit all use-cases perfectly. RI…
I wonder if this is a more common name for silicon in some other part of the world (I'm in the US). I don't think I've ever seen this spelling before today, and I'm not a young person.
Re: Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
#86Earlier quoted context omitted.
this is fantastic! they're the first sophon benchmark results i've seen, and they're far more comprehensive than most benchmark results of any kind have you run into any toolchain difficulties due to the 0.7.1 nature of the rvv?
Yes. I'm using the old gnu toolchain branch from brucehoult and write the benchmarks such that they work in rvv 1.0 and rvv 0.7.1. To help with that I've got a gnu assembler macro file that does 1 to 1 instruction translation when possible and for the other cases I need to #if/#else/#endif. I'm working on rvv unicode conversions, and plan to release a blog post/article with benchmarks and explanation soon. The proble…
Re: Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
#87How difficult is working with risc v currently? I’m guessing back Linux works but most precompiled stuff not?
If there's an issue with RISC-V it's that it's not one ISA with additional instructions accumulating across generations (which I think describes x86), it's a core ISA with a variety of extension blocks that might or might not be present in your implementation. I think this means that any random RISC-V binary stands a greater chance of not working on a chip you've bought than e.g. any random x86 binary with an x86 chip.
Re: Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
#88Earlier quoted context omitted.
Interesting, I had the opposite experience: the GUI was very slow and nearly unusable on most RISC-V boards that I have, except the LicheePi4a. But that is probably just due to the GPU (which unfortunately doesn't have open source drivers yet?), and not the CPU, and they're all running different kernels and distros. When I have some time I'll need to compare again with the latest distro available for each, and also a…
You have to keep in mind that since RISC-V is an ISA standard, C[gcc] coded kernels are here for legacy support purpose. The C[gcc] language is not appropriate anymore, assembly coded is the right(tm) way.
Re: Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
#89How difficult is working with risc v currently? I’m guessing back Linux works but most precompiled stuff not?
Re: Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues
#90First tests of RISC-V laptop reveal a number of software and hardware issues, but show a path to freedom.
> a path to freedom Free how? Just because RISC-V is an open ISA doesn't mean that the silicon is open. None of the manufacturers release the full design of the SoC. Many RISC-V SoCs are still relying on blobs. Most (all?) current available RISC-V SoCs are designed and produced in China. So I wouldn't be so sure about a SoC designed by Alibaba to be free of blobs, license violations, patent infringement or even hardw…