Intel to set its FPGA unit free to pursue its own path • Hacker News Board

Re: Intel to set its FPGA unit free to pursue its own path

#81

Post by padf » Fri, Oct 06, 2023, 7:28 AM UTC

sitkack wrote: post #74

hobo_mark wrote: post #69

Earlier quoted context omitted.

> They have better tools, documentation, and support than Gowin, who is a recent Chinese FPGA upstart using stolen Lattice IP and hires. Naive of me to ask, but how are they allowed to sell anywhere outside of China?

> stolen Lattice IP and hires If this is true, then the bitstream for Gowin and Lattice parts would be similar and both are being actively reverse engineered to be supported by OSS tools. It would be nice to see more evidence of this.

I don't think there is any evidence of this. Open Source tools fully support Lattice (low end) FPGAs, and support for Gowin FPGAs is not quite as mature. It seems that many of the initial FPGA patents have expired, and that's why many small FPGA vendors are appearing. Please correct me if I am wrong.

Re: Intel to set its FPGA unit free to pursue its own path

#82

Post by SilverBirch » Fri, Oct 06, 2023, 4:54 PM UTC

Aromasin wrote: post #77

SilverBirch wrote: post #73

Earlier quoted context omitted.

Xilinx and Altera fundamentally do the same thing to an almost silly extent. There are a handful of fundamental building blocks that make up an FPGA, and in every case Xilinx's implementation differs from Altera, but in trivial ways. Altera have an Adaptive Logic module whereas Xilinx have a Configurable Logic Block . They're really just look up tables. So where the rubber meets the road is how good the tooling is an…

Altera were roadblocked by relying on Intel nodes. Their new product lines (Agilex 9/7/5/3) are excellent however, despite being 3 or 4 years too late to the market. I've been lucky enough to have early access to them. It's going to be an uphill battle for Altera to win back lost business but based on current performance, and looking at AMDs roadmaps, I wouldn't put it past Altera to take the lead again.

Being an independent company is almost certainly going to give them an edge going against Xilinx under AMD - atleast when it comes to the pure FPGA play, and there's been surprisingly little innovation in that area (although I never found out if they actually got hyperflex to work)

Re: Intel to set its FPGA unit free to pursue its own path

#83

Post by sitkack » Sat, Oct 07, 2023, 7:25 PM UTC

padf wrote: post #81

sitkack wrote: post #74

Earlier quoted context omitted.

> stolen Lattice IP and hires If this is true, then the bitstream for Gowin and Lattice parts would be similar and both are being actively reverse engineered to be supported by OSS tools. It would be nice to see more evidence of this.

I don't think there is any evidence of this. Open Source tools fully support Lattice (low end) FPGAs, and support for Gowin FPGAs is not quite as mature. It seems that many of the initial FPGA patents have expired, and that's why many small FPGA vendors are appearing. Please correct me if I am wrong.

I agree. IP theft is a bold claim, that is why I was asking for more citations.

Not only are the patent expired, but there are three projects that generate FPGA fabrics programmatically. FPGAs are extremely easy to construct as they are a repeating lattice.

Re: Intel to set its FPGA unit free to pursue its own path

#84

Post by Aromasin » Mon, Oct 09, 2023, 8:00 AM UTC

SilverBirch wrote: post #82

Aromasin wrote: post #77

Earlier quoted context omitted.

Altera were roadblocked by relying on Intel nodes. Their new product lines (Agilex 9/7/5/3) are excellent however, despite being 3 or 4 years too late to the market. I've been lucky enough to have early access to them. It's going to be an uphill battle for Altera to win back lost business but based on current performance, and looking at AMDs roadmaps, I wouldn't put it past Altera to take the lead again.

Being an independent company is almost certainly going to give them an edge going against Xilinx under AMD - atleast when it comes to the pure FPGA play, and there's been surprisingly little innovation in that area (although I never found out if they actually got hyperflex to work)

It's worth investing some time in it now. The tools are a bit more fleshed out along with the documentation, so it's not the pain it once was. It's been a godsend for some image processing work I've been doing of late. The performance improvements have been phenomenal.