Earlier quoted context omitted.
Not OP, but that's not how I interpreted their comment. I interepreted it as the 70% they hope to have fixed will end up having edge cases not yet considered, and the protections will end up weaker than desired. No-one designed a processor to be susceptable to spectre and meltdown, once something moves into production there is significantly more incentive to investigate and find these flaws.
We do have formal proofs of various security properties at the architectural level that consider the entire architecture with all its complexities and warts. Speculative execution is of course a concern (and is an active area of research for us), though our belief is that the bounds information now present at the hardware level allows it to be tamed. Another concern is the interaction between undefined behaviour and…
Arm releases experimental CHERI-enabled Morello board
81–84 of 84 posts
Re: Arm releases experimental CHERI-enabled Morello board
#82Great to see further progress on CHERI! See the following for theoretical foundations for the work: Linux 60th Anniversary Keynote https://t.co/IRe3vpMlWn
Your research on actor-based programming models has nothing to do with C/C++ spatial and temporal memory safety.
Re: Arm releases experimental CHERI-enabled Morello board
#83Earlier quoted context omitted.
Your research on actor-based programming models has nothing to do with C/C++ spatial and temporal memory safety.
Foundation is about rigorously specifying the general Laws of Locality for Actor systems that CHERI implements.
Re: Arm releases experimental CHERI-enabled Morello board
#84Earlier quoted context omitted.
Foundation is about rigorously specifying the general Laws of Locality for Actor systems that CHERI implements.
CHERI is not an actor system. It is a capability system aimed at memory protection. It can be used, like any other architecture, as a basis upon which to build an actor-based framework/system, but it is no more of an actor system than, say, x86. The concepts are deeply rooted in the capability system literature.