81–88 of 88 posts
I was going to sign up for this immediately. Then I read the FAQ: - No IPv6 -- sucks, but I can live with that - No IPv4 -- WTF? NAT on a server?! - A credit card is required. I can't pay them. Asked via support, they confirm credit card is the only way. - I still haven't found where the instances are physically located. (Edit: it's in the "General FAQ", not in the "Server FAQ".) I really, really like the idea, but t…
An interesting clause in the terms and conditions: * Users recognise that piracy harms artistic creation.
I wonder if I could buy a couple of those servers for my own. I work on cloud and data-center automation tools and having real metal to test ideas and software would be amazing. I've been toying with the idea of hooking up a couple Edisons or Galileos (x86 makes everything easier on my side) but they have complete running hardware and that easily beats developing my own.
Interestingly even though it's 'bare metal' you are stuck using their kernel: https://community.scaleway.com/t/official-linux-kernel-new-m... /proc/cpuinfo hints at Armada XP so I thought mv_cesa crypto would be available but alas, no: # zcat /proc/config.gz | grep -i cesa CONFIG_CRYPTO_DEV_MV_CESA=y # grep -i cesa /proc/crypto # Shame. Does anyone know what CPU is that exactly? The Soc in the picture at techcrunch s…
Earlier quoted context omitted.
~# fio --randrepeat=1 --ioengine=libaio --direct=1 --gtod_reduce=1 --name=test --filename=test --bs=4k --iodepth=16 --size=4G --readwrite=randread test: (groupid=0, jobs=1): err= 0: pid=17457: Thu Sep 3 12:39:10 2015 read : io=0B, bw=115612KB/s, iops=28903, runt= 36279msec cpu : usr=17.12%, sys=67.12%, ctx=35506, majf=0, minf=39 IO depths : 1=0.1%, 2=0.1%, 4=0.1%, 8=0.1%, 16=100.0%, 32=0.0%, >=64=0.0% submit : 0=0.0%…
Officially they provide 2000 read/write IOPS for a volume composed of one chunk (50GB) [1]. You measured 4000 r/w IOPS, so does this mean you ran it on a 100GB volume? If yes, then that's pretty amazing you get exactly the expected allocated IOPS performance for a $3.40/mo server. [1] https://www.scaleway.com/faq/server/
Earlier quoted context omitted.
Tangential rant: What is wrong with CPU manufacturers in particular? What do they gain from giving everything the most confusing names possible? Sockets LGA1155, LGA1150, LGA1151. CPUs only differentiated by a jumble of digits anymore. Something is seriously wrong with your product naming strategy when it needs to be clarified that ARM7 != ARMv7.
Intel uses the letters to indicate the type of connection between the CPU and motherboard. So LGA = Land Grid Array [1]. The number is the number of pins/contacts connecting the CPU to the motherboard. So LGA1155 is a Land Grid Array Socket with 1,155 pins. It's definitely not random, at least not with Intel. ARM is confusing as hell though. Part of the issue is that there is the ARM Instruction Set Architecture (ISA…
Their scheme may be somewhat internally consistent (until they change it again next year). The information it conveys remains completely useless.
Nobody cares about the number of pins on a socket or which "generation" a CPU belongs to.
We want to know which CPU is compatible to which socket, and how CPUs compare on their key metrics.
So here's a useful naming scheme: Sockets should be called S1, S2, S3 [...]
CPUs should be called: S1-8-40W-PM15000
That would be an 8 core CPU for Socket S1 that draws 40W and scores PassMark 15000.
If Intel & co insist on making us sift through hostile numeric identifiers then they should at least make them useful.
Earlier quoted context omitted.
To be even more specific, these CPU are produced by Marvell under the name Armada 370/XP (according /proc/cpuinfo), and are based on ARM's Cortex A9 design (source: https://scaleway.com/faq/server/#-Why-did-you-choose-ARM ).
According to /proc/cpuinfo, CPU Implementer is 0x56 ('V' = Marvell) and CPU part is 0x584 (Marvell Armada XP). This is most likely not Cortex A9 (which would have CPU Implementer == 0x41 and CPU part == 0xC09), but Marvell's own PJ4 microarchitecture.