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A new Intel Itanium (IA-64) emulator that boots Windows

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Re: A new Intel Itanium (IA-64) emulator that boots Windows

#71

Post by monocasa »

eigenform wrote: post #69
monocasa wrote: post #60

Earlier quoted context omitted.

OoO cores have load stalls too after preemptions. Even something like a Apple M core basically has to stall if the load has to go out to the memory controller. The goal is to move far enough ahead in the stream that you can at least issue the next load, and advaned loads lets you do that. Some Intel cores will occasionally speculatively predict zero for a load, but AFAIK that got turned off as part of the Spectre mit…

The difference is that this is not the programmer's responsibility in modern machines: instead we bake-in some hardware that watches the online state of the machine and then actively decides on what to do. If you're trying to create a compiler that approaches the effectiveness of this statically, you're condemned to do a ton of extra work (you're essentially writing an emulator for your CPU core, and then a compiler…

Once again, Itanium isn't a normal, simple in order core that stalls on loads. It has a big table called the ALAT to allow you to start loads as soon as you know the address, and then finalize them later when you're out of other work to do.

It doesn't require determinism to work. And was designed by people that were quite aware of what the instruction stream looks like to an OoO core as it issues out of the rob.

Itanium had other sins than "magic compiler" woes, or even the inherent unpredictability of memory accesses. Mostly that it, like Cell, and Netburst was designed for a world where dennard scaling didn't end like a brick wall. As well as internal politics of Intel making it so that they were a bit loose and fast with die area.

Re: A new Intel Itanium (IA-64) emulator that boots Windows

#72

Post by nubinetwork »

rbanffy wrote: post #66
nubinetwork wrote: post #42

Earlier quoted context omitted.

I'm still waiting on mine, I doubt I'll ever see it though...

They are in a tough spot. They have to pick between milking their legacy clients who have been running VMS workloads and don’t want to port them to anything else, and a much more risky attempt to develop a consulting ecosystem so those clients can remain on VMS indefinitely. This ecosystem would eat into their own support business at the expense of reducing incentives to migrate to different platforms.

I'll admit that "OS snob who just wants to run VMS because they once ran it on Alpha" is pretty low on the freebie list, but they didn't even say no, they just strung me along until I gave up caring.

Re: A new Intel Itanium (IA-64) emulator that boots Windows

#73

Post by imtringued »

bri3d wrote: post #20
Joel_Mckay wrote: post #14

Earlier quoted context omitted.

To be fair, most of ia64 performance issues were in the more complicated compilers. The chip itself had potential, but essentially abandoned the DOS/Windows market inertia. =3

No (sorry, I post this every time the Mythical Compiler Myth reappears), the problem with VLIW is that it fundamentally doesn’t work for anything with unpredictable memory access patterns, and modern general purpose computing has moved almost exclusively in this direction. For VLIW to work, you need to either guess correctly what is in cache or not have a cache at all; as soon as you mispredict what has been loaded,…

Honestly, you're conflating two things.

1. VLIW exposes microarchitectural details, locking them in like an ABI. Updates to the microrachitecture will require changes to the ISA, thereby breaking backwards compatibility with every generation.

2. The dominant programming paradigm is sequential code, often just old C code with heavy pointer aliasing and little compile time extractable parallelism. This reduces static parallelism in the code base and shifts it into a runtime problem. The CPU discovers the dependencies at runtime instead. If you built a programming language that exposes more parallelism (think something like ParaSail), this problem wouldn't be as big as it is for C style programming languages.

Nobody will build a language for architectures that suffer from backwards compatibility problems, so why bother? VLIW is primarily suited for ASIPs and not much else.

Re: A new Intel Itanium (IA-64) emulator that boots Windows

#74

Post by rbanffy »

nubinetwork wrote: post #72
rbanffy wrote: post #66

Earlier quoted context omitted.

They are in a tough spot. They have to pick between milking their legacy clients who have been running VMS workloads and don’t want to port them to anything else, and a much more risky attempt to develop a consulting ecosystem so those clients can remain on VMS indefinitely. This ecosystem would eat into their own support business at the expense of reducing incentives to migrate to different platforms.

I'll admit that "OS snob who just wants to run VMS because they once ran it on Alpha" is pretty low on the freebie list, but they didn't even say no, they just strung me along until I gave up caring.

I really wish they released it under a GPL license. Unless an event starts an adoption uptick for greenfield projects (and it'd take some time for that). I wish they had an easy way to deploy an OpenVMS instance on a cloud service the same way IBM does with their POWER and Z machines (sadly, no Linux on POWER from them).

Re: A new Intel Itanium (IA-64) emulator that boots Windows

#75

Post by rbanffy »

anyfoo wrote: post #26
rbanffy wrote: post #4

Earlier quoted context omitted.

I have been pairing with Claude Opus and it’s quite impressive. I have explored a number of possible changes to things like VTE and the Hercules mainframe emulator.

Sweet. What changes to Hercules have you been considering? I have had a long running (and maintained!) MVS instance in Hercules for quite a few years now, just for fun.

I want a telnet port connecting directly to the Hercules console when it runs headless, as that is the way it ends up running in Docker. The Hercules console does a lot of heavy lifting that could be implemented at the terminal (as even Windows now has a proper terminal). It went as far as allowing me to connect and see the console transcript, which is pretty already.

Another thing I want that I haven't figured out is to print to my network printers - they all do lpr and ipp, but Hercules direct to socket approach didn't work for me and I need to do more research on that. Ideally, the line in the config could be a pipe command where I could turn the page into PostScript to be netcat it to the printer. or massage it through a converter that took in an IBM line printer EBCDIC stream and spat out ASCII for a "normal" printer.

Re: A new Intel Itanium (IA-64) emulator that boots Windows

#76

Post by nubinetwork »

rbanffy wrote: post #74
nubinetwork wrote: post #72

Earlier quoted context omitted.

I'll admit that "OS snob who just wants to run VMS because they once ran it on Alpha" is pretty low on the freebie list, but they didn't even say no, they just strung me along until I gave up caring.

I really wish they released it under a GPL license. Unless an event starts an adoption uptick for greenfield projects (and it'd take some time for that). I wish they had an easy way to deploy an OpenVMS instance on a cloud service the same way IBM does with their POWER and Z machines (sadly, no Linux on POWER from them).

Huh. It looks like they're actually getting rid of their as400 hosting... I wonder what that would have cost, being the only players in the game...

> Images for the Virtual Server for VPC (s390x architecture) are deprecated. Starting 28 February 2026, you can't create new instances from s390x images. Existing instances are supported until 20 February 2027. Any instances that remain after that date are deleted.

Re: A new Intel Itanium (IA-64) emulator that boots Windows

#77

Post by eigenform »

monocasa wrote: post #71
eigenform wrote: post #69

Earlier quoted context omitted.

The difference is that this is not the programmer's responsibility in modern machines: instead we bake-in some hardware that watches the online state of the machine and then actively decides on what to do. If you're trying to create a compiler that approaches the effectiveness of this statically, you're condemned to do a ton of extra work (you're essentially writing an emulator for your CPU core, and then a compiler…

Once again, Itanium isn't a normal, simple in order core that stalls on loads. It has a big table called the ALAT to allow you to start loads as soon as you know the address, and then finalize them later when you're out of other work to do. It doesn't require determinism to work. And was designed by people that were quite aware of what the instruction stream looks like to an OoO core as it issues out of the rob. Itan…

Yes, I'm pointing out the fact that the programmer is expected to manage the ALAT, and that these machines do not automatically recover from cases where your advanced loads are incorrect. That process is expected to be part of the instruction stream, and [we have collectively learned that] that's an expensive feedback loop.

Yes, it doesn't require determinism to work, but it means that your performance is especially sensitive to nondeterminism because the compiler cannot account for loads and stores that occur online. The SDM (see vol 1, section 9.5.1) describes this idea pretty well.

Re: A new Intel Itanium (IA-64) emulator that boots Windows

#78

Post by kiaansaraiya »

This is much harder problem than most CPU emulators as IA-64 isn't really just another ISA. EPIC most significantly allows the RE which seems like the main implementation challenge. Does the emulator model the RSE or are there shortcuts for Windows compatibility? Also, which Windows model is booting?

Re: A new Intel Itanium (IA-64) emulator that boots Windows

#79

Post by djhope99 »

shoo wrote: post #46
djhope99 wrote: post #22

I have a funny story about a windows IA-64 box. I was working for a large bank and it was all windows, including production. We used to run WebSphere Application Server on Windows. I was looking for a dev server to run unit tests on, including integration tests which required an actual WebSphere instance. The infrastructure team said they had “a box” going spare and it turned out to be IA64 on Windows. If my memory s…

Am I right to guess that neither your dev nor prod machines ran IA-64? If so that's not ideal, but beggars can't be choosers & a spare box from the infra team available right now is better than getting a box built to meet your exact specs available after the usual multi-quarter internal lead time. Superficially it sounds a little crazy, but it's probably a lot less crazy than far more mainstream antipatterns (e.g. 'l…

> If so that's not ideal

Agreed!!

I would have loved something better but sometimes you just have to make do.

WebSphere was 99% Java (except for a few pesky dlls) and I never saw any oddities, it worked the same as it did on the old x86 VM I had which was woefully under spec. Our entire software platform was on WebSphere.

It really was a meaty box, which was a huge help because the tests originally (before IA64 box) used to take all night to run.

Re: A new Intel Itanium (IA-64) emulator that boots Windows

#80

Post by monocasa »

eigenform wrote: post #77
monocasa wrote: post #71

Earlier quoted context omitted.

Once again, Itanium isn't a normal, simple in order core that stalls on loads. It has a big table called the ALAT to allow you to start loads as soon as you know the address, and then finalize them later when you're out of other work to do. It doesn't require determinism to work. And was designed by people that were quite aware of what the instruction stream looks like to an OoO core as it issues out of the rob. Itan…

Yes, I'm pointing out the fact that the programmer is expected to manage the ALAT, and that these machines do not automatically recover from cases where your advanced loads are incorrect. That process is expected to be part of the instruction stream, and [we have collectively learned that] that's an expensive feedback loop. Yes, it doesn't require determinism to work, but it means that your performance is especially…

You didn't generally need to manage the ALAT as a programmer.

You can, in the same way that you can manually manage reservation station port residency as a programmer in an OoO core to get maximum throughput, but neither of those are required in normal programming.

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