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FPGAs Need a New Future

allaboutcircuits.com

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Re: FPGAs Need a New Future

#71

Post by willis936 »

exmadscientist wrote: post #13

FPGAs need their "Arduino moment". There have been so, so, so many projects where I've wanted just a little bit of moderately-complicated glue logic. Something pretty easy to dash off in VHDL or whatever. But the damn things require so much support infrastructure: they're complicated to put down on boards, they're complicated to load bitstreams in to, they're complicated to build those bitstreams for, and they're com…

It's already happened, people just haven't realized. iCE40-UP5K costs a few bucks, needs minimal support circuitry, and is supported by FOSS toolchains (yosys). Fun packages like the pico-ice bring it all the way down to the entry-level arduino crowd. It just doesn't have the marketing mindshare.

Re: FPGAs Need a New Future

#72

Post by pclmulqdq »

tverbeure wrote: post #69
pclmulqdq wrote: post #46

Earlier quoted context omitted.

This is how most FPGA users interact with vivado/quartus these days.

One really wonders when reading some of the comments here…

I should have said "most _professional_ FPGA users" because I assume many people here who don't know this (including the author of the article) are not.

Re: FPGAs Need a New Future

#73

Post by rramadass »

exmadscientist wrote: post #13

FPGAs need their "Arduino moment". There have been so, so, so many projects where I've wanted just a little bit of moderately-complicated glue logic. Something pretty easy to dash off in VHDL or whatever. But the damn things require so much support infrastructure: they're complicated to put down on boards, they're complicated to load bitstreams in to, they're complicated to build those bitstreams for, and they're com…

> FPGAs need their "Arduino moment".

This is exactly it. Why hasn't some expert group produced a very simple open design board with a simple Arduino-like IDE for FPGAs? Make it easy to access and use, get it into the hands of makers/hobbyists and watch the apps/ecosystem explode.

As an example, one could provide soft-cores for 8051/RISC-V etc. right out of the box with a menu of peripherals to mix and match. Provide a simple language library wrapper say over SystemVerilog (or whatever the community settles on) just like Arduino did (with C++) that makes it "easy" to program the FPGA.

For apps, one good example would be putting TinyML (or any other ML/LLM models) on a FPGA. This would take advantage of the current technology wave to make this project a success.

PS: Folks might find the book FPGAs for Software Programmers by Dirk Koch et al. (https://link.springer.com/book/10.1007/978-3-319-26408-0) useful.

Re: FPGAs Need a New Future

#74

Post by bsder »

mastax wrote: post #66

My prediction is one of the Chinese FPGA makers will embrace open source, hire a handful of talented open source contributors, and within a handful of years end up with tooling that is way easier to use for hobbyists, students, and small businesses. They use this as an inroad and slowly move upmarket. Basically the Espressif strategy. Xilinx, Altera, and Lattice are culturally incapable of doing this. For lattice esp…

> My prediction is one of the Chinese FPGA makers will embrace open source

Sadly, this doesn't seem to be panning out because the Chinese domestic market has perfectly functional Xilinx and Altera clones for a fraction of the price. Consequently, they don't care about anything else.

It irritates me to no end that Gowin won't open their bitstream format because they'd displace a bunch of the low end almost immediately.

Re: FPGAs Need a New Future

#75

Post by exmadscientist »

15155 wrote: post #55
exmadscientist wrote: post #51

Earlier quoted context omitted.

It's mostly the whole "two binaries" problem. Oh look, the factory screwed up and isn't flashing the MCU this week! Does the board survive? Oh look, the factory screwed up and isn't flashing the PLD this week! Does the board survive? Oh look, the factory... wait, what is the factory doing and why are they putting that sticker on that .... You get the idea. Yes, yes, it is all solvable. I have never claimed it isn't.…

Embed the bitstream into your MCU firmware binary, bitbang the 50-100KB bitstream into SRAM via JTAG from your MCU in all of 10ms. This is <100 lines of Rust.

Yes, it's solvable. But my whole argument is that the entire experience is death by a thousand cuts. I'm not seeing how "it's possible in 100 lines of Rust" (a language most people don't even use for embedded work) is really countering my argument.

Re: FPGAs Need a New Future

#76

Post by exmadscientist »

tverbeure wrote: post #60
exmadscientist wrote: post #49

Earlier quoted context omitted.

No, it wasn't. Those are mostly available in PLCC and DIP packages and even if you can get the SOIC/TSSOP versions they still cost $1.20 each at 10k volume. That's flat-out unacceptable for 99% of the things I do. The entire rest of the board I was talking about was $4.60. Processor included. $1.20 is not going to fly.

“Reduces use case and requirements to something impossibly niche and low volume then yells at the clouds.” Anyway, just tie the output of 21 emitter followers together, add a resistor and - tadaaa - 21 input OR!

Hey, that was my problem from last week. And, yes, I agree with you -- it was best solved another way.

But please don't complain when I give concrete examples of things I'd like to do but couldn't. (And please do recognize that there was a lot more context to the mess than just "I need an OR gate", but no one cares about the real gory details.)

Re: FPGAs Need a New Future

#77

Post by d_tr »

pclmulqdq wrote: post #44
exmadscientist wrote: post #14

Earlier quoted context omitted.

The main advantage to VHDL is the style of thinking it enforces. If you write your Verilog or SystemVerilog like it's VHDL, everything works great. If you write your VHDL like it's Verilog, you'll get piles of synthesis errors... and many of them will be real problems. So if you learn VHDL first, you'll be on a solid footing.

There is a trend among programmers to assume that everything supported by the syntax can be done. This is not even true in C++, but it's something people think. If you are writing synthesizable SystemVerilog, only a small subset of the language used in a particular set of ways works. You have to resist the urge to get too clever (in some ways, but in other ways you can get extremely clever with it).

I thought that if you have some idea about how hardware works, it is kind of more or less obvious whether something is synthesizable or not.

Re: FPGAs Need a New Future

#78

Post by mikepurvis »

delifue wrote: post #32
malmeloo wrote: post #22

One big issue with FPGAs is how annoying it is to learn how to use them. I did a course on embedded systems a few years ago and nobody could truly get to enjoy it because we spent most of our time downloading and installing huge toolchains, waiting for synthesis and PnR to complete and debugging weird IDE issues. We need to open up the space to allow people to develop better solutions than what these companies are fo…

Modern large productivity software (including IDE) are often "fragile". Sometimes some configuration is wrong and it behave wrongly but you don't know which configuration. Sometimes it relies on another software installed on system and if you installed the incompatible version it malfunctions without telling you incompatibility. Sometimes the IDE itself has random bugs. A lot of time is spent workarounding IDE issues

Building for an fpga shouldn’t be any harder than building for cortex mcus, and there are lots of free/oss toolchains and configurations for those.

Re: FPGAs Need a New Future

#79

Post by bee_rider »

javawizard wrote: post #30
timthorn wrote: post #18

Earlier quoted context omitted.

Sounds like a PLD might suit your usecase? Simpler than an FPGA, programmed like an EEPROM, perfect for glue logic.

I wish CPLDs were more well known in the common vernacular. The industry draws a distinction between CPLDs and FPGAs, and rightly so, but most "Arduino-level" hobbyists think "I want something I can program so that it acts like such-and-such a circuit, I know, I need an FPGA!" when what they probably want is what the professional world would call a CPLD - and the distinction in terminology between the two does more t…

I don’t know anything about this (other than doing mediocre in some undergrad Verilog classes one million years ago). Wikipedia seems to call FPGAs a type of PLD. Of course, everybody has heard of FPGAs; is it right to think they’ve sort of branched off, become their own thing, and eclipsed their superset?

Re: FPGAs Need a New Future

#80

Post by amirhirsch »

jhide wrote: post #29

This article could’ve been written 20 years ago with only minor revisions, and it would’ve been true then. But it’s not now. It is trivial, literally a day of work, to set up a build system and CICD environment using Verilator if you are already proficient with your build system of choice. Learning TCL to script a bitfile generation target using your FPGA vendor’s tools is a few extra days of work. And regarding IDE…

I did write this 20 years ago https://fpgacomputing.blogspot.com/2006/05/methods-for-recon...

The vendor tools are still a barrier to the high-end FPGA's hardened IP

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