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AI chipmaker Cerebras files for IPO

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Re: AI chipmaker Cerebras files for IPO

#72
post #7

This is the first I've heard of Cerebras Systems. From the article >Cerebras had a net loss of $66.6 million in the first six months of 2024 on $136.4 million in sales, according to the filing. That doesn't sound very good. What makes them think they can compete with Nvidia, and why IPO right now? Are they trying to get government money to make chip fabs like Intel or something?

Nvidia's moat is real but not big enough that one can't surpass it with a lot of engineering. It's not the only company making AI accelerators, and this has been the case for many years already. The first TPU was introduced in 2015. Nvidia has just managed to get a leader position in the race.

> Nvidia's moat is real but not big enough that one can't surpass it with a lot of engineering.

Yes, but you also need a lot of capital if you want node parity with them. Nvidia (supposedly) spent an estimated $9 billion dollars getting onto TSMC's 4nm node. https://www.techspot.com/news/93490-nvidia-reportedly-spent-...

Re: AI chipmaker Cerebras files for IPO

#74
post #58

Wafer scale integration has been a thing since wafers. Yet, I almost never read of anyone taking it the full distance to a product. I don't know if it turns out the yield per die per wafer or the associated technology problems were the glitch, but it feels like a good idea which never quite makes it out the door.

They don't give yield numbers but this says that they get acceptable yields by putting extra cores on the silicon and then routing around the defective ones. https://cerebras.ai/blog/wafer-scale-processors-the-time-has...

I found this bit interesting: They worked with TSMC to ensure the off-die areas used for test and other foundry purposes have been more clearly circumscribed so they can use the blanks between the chips for the inter-chip connects. The distances are kept short and they can avoid a lot of encode/decode logic costs associated with how people used to do this:

"The cross scribe line wiring has been developed by Cerebras in partnership with TSMC. TSMC allowed us to use the scribe lines for tens of thousands of wires. We were also allowed to create certain keep-out zones with no TSCM test structures where we could embed Cerebras technology. The short wires (inter-die spacing is less than a millimeter) enable ultra-high bandwidth with low latency. The wire pitch is also comparable to on-die, so we can run the inter-die wires at the same clock as the normal wires, with no expensive serialization/deserialization. The overheads and performance of this homogeneous communication are far more attractive than those of multi-chip systems that involve communication through package boundaries, transceivers, connecters or cables, and communication software interfaces."

Re: AI chipmaker Cerebras files for IPO

#75
post #58

Wafer scale integration has been a thing since wafers. Yet, I almost never read of anyone taking it the full distance to a product. I don't know if it turns out the yield per die per wafer or the associated technology problems were the glitch, but it feels like a good idea which never quite makes it out the door.

They don't give yield numbers but this says that they get acceptable yields by putting extra cores on the silicon and then routing around the defective ones. https://cerebras.ai/blog/wafer-scale-processors-the-time-has...

I believe I’ve heard them say they have 100% yield. They haven’t made very many yet though, on the order of 100.

Re: AI chipmaker Cerebras files for IPO

#76

NVIDIA is pretty established but there's also Intel, AMD, Google to contend with. Sure Cerebras is unique in that they make one large chip out of the entire wafer but nothing prevents these other companies from doing the same thing. Currently they are choosing not to because of wafer economics but if they chose to, Cerebras would pretty much lose their advantage. https://www.servethehome.com/cerebras-wse-3-ai-chip-la…

Comparing a WSE-3 to a H100 without considering the systems they go in or the systems, cooling, networking, etc that supports them means little when doing cost analysis, be it CapEx or TCO. A better (but still flawed) comparison would be a DGX H200 (a cluster of H100's and their essential supporting infra) to a CS-3 (a cluster of WSE-3's and their essential supporting infra in a similar form factor/volume of a DGX H200).

Now, is Cerebras going to eventually beat Nvidia or at least compete healthily with Nvidia and other tech titans in the general market or a given lucrative niche of it? No idea. That'd be a cool plot twist, but hard to say. But it's worth acknowledging that investing in a company and buying their products are two entirely separate decisions. Much of silicon valleys success stories are a result of people investing in the potential of what they could become, not because they were already the best on the market, and for nothing else, Cerebras approach is certainly novel and promising.

Re: AI chipmaker Cerebras files for IPO

#77

On the one hand, the financials are terrible for an IPO in this market. On the other, Nvidia is worth 3trn so they can sell a pretty good dream of what success looks like to investors. Personally I would expect them to get a valuation well about the 4bln from the 2021 round, despite the financials not coming close to justifying it.

It’ll pop. The it’ll rot.

Re: AI chipmaker Cerebras files for IPO

#78

Cerebras is well-known in the AI chip market. They make chips that are an entire wafer. https://spectrum.ieee.org/cerebras-chip-cs3

Making larger monolithic silicon doesn't get 2x as expensive to get 2x as large. Bigger silicon is massively more expensive. I'm not sure that making each piece require a large chunk of perfect wafer is a fantastic idea, especially when you're looking to unseat juggernauts who have a great deal of experience making high quality product already.

0.5% overheads for defects. You are not correct.

Re: AI chipmaker Cerebras files for IPO

#80
post #25
post #19

Earlier quoted context omitted.

SRAM is scaling significantly more slowly than logic in recent process nodes.

Ahh that explains it, thanks. Seems like a potentially large problem given their strategy.

They could use something like GCRAM[1] to double capacity if they had to...but it's not clear how much worse performance would be.

[1]https://raaam-tech.com/products/

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